• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to project page

2000 Fiscal Year Final Research Report Summary

High Accuracy and High Speed Analog Integrated Circuit Using Metal Substrate SOI Structure

Research Project

Project/Area Number 11450117
Research Category

Grant-in-Aid for Scientific Research (B).

Allocation TypeSingle-year Grants
Section一般
Research Field Electronic materials/Electric materials
Research InstitutionTohoku University

Principal Investigator

KOTANI Koji  Tohoku University, Graduate School of Engineering, Associate Professor, 大学院・工学研究科, 助教授 (20250699)

Co-Investigator(Kenkyū-buntansha) OHMI Tadahiro  Tohoku University, New Industry Creation Hatchery Center, Professor, 未来科学技術共同研究センター, 教授 (20016463)
Project Period (FY) 1999 – 2000
KeywordsSOI / Metal substrate / Analog integrated circuit / Kink effect / Operational amplifier / Gas-isolated interconnect / Bonded SOI wafer / Metal-gate MOS transistor
Research Abstract

Operation mechanism of SOI devices has been analyzed by device simulation. It is revealed that low drain voltage operation, where high transconductance is achieved, is also effective for obtaining high drain resistance and therefore effective for realizing high performance amplifier since kink-effect due to impact ionization and punch-through effect can be prevented. Low voltage swing amplifier which effectively operates at low voltage bias has been designed. The amplifier has a high gain at low frequency region as well, while conventional amplifier exhibits the degradation of a gain at low frequency region. We have designed a high accuracy pipeline A/D converter utilizing low voltage swing amplifier.
The best structure for interconnects in terms of accurate and rapid propagation of signals has been analyzed by electro-magnetic simulation based on Maxwell's equations. It is found that metal substrate structure instead of conventional Si substrate is very effective for minimizing signal … More attenuation and signal delay and 100ps pulse signal can propagate up to 2mm in length. If the interconnect width gets smaller than the skin depth which is determined by signal frequency, however, signal propagation characteristics are severely degraded by the resistance of the interconnect itself. Gas-isolated-interconnect structure is found to be very effective to prevent signal degradation.
The difference of various types of SOI wafers has been experimentally verified in terms of the noise characteristics of MOD devices. It is found that the bonded SOI wafer having epitaxial SOI layer has the best SOI-BOX interface characteristics and is very effective for reducing uncertain noise and realizing high accuracy analog circuit applications.
Process technologies to fabricate metal-gate MOS devices have been developed. It is found that highly reliable metal gate MOS devices can be realized by TaNx/Ta/TaNx stacked gate electrode structure formed by sputtering process utilizing newly developed high-density plasma. Less

  • Research Products

    (20 results)

All Other

All Publications (20 results)

  • [Publications] T.Ushiki,K.Kotani,T.Funaki,K.Kawai,and T.: "Characterization of electrically active defects at SOI-BOX interface on high-dose SIMOX wafers"9th International Conference on Production Engineering. JSPE No.3. 567-572 (1999)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Ushiki,K.Kawai,I.Ohshima,and T.Ohmi: "Effect of in-situ formed interlayer at Ta-SiO2 interface on performance and reliability in Ta-gate MOS devices"Extended Abstract of the 1999 International Conference on Solid State Devices and Materials. 178-179 (1999)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Ushiki,K.Kotani,T.Funaki,K.Kawai,and T.: "Evidence of energetically-localized trap-states at SOI-BOX interface in high-dose SIMOX wafers"1999 IEEE International SOI Conference. 48-49 (1999)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Ushiki,K.Kotani,T.Funaki,K.Kawai,and T.: "New Aspects and Mechanism of Kink Effect in Static Back-Gate Transconductance Characteristics in Fully-Depleted SOI MOSFETs on"IEEE Trans.on Electron Devices. 47・2. 360-366 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] A.Morimoto,K.Kotani,S.Sugawa,and T.Ohmi: "Interconnect and Substrate Structure for High Speed Giga-Scale Integration"Extended Abstract of the 2000 International Conferences on Solid State Devices and Materials. 418-419 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] H.Shimada,I.Ohshima,T.Ushiki,S.Sugawa,and T.: "Low Resistivity PVD TaNx/Ta/TaNx Stacked Metal Gate CMOS Technology Using Self-Grown bcc-Phased Tantalum on TaNx Buffer Layer"Extended Abstract of the 2000 International Conferences on Solid State Devices and Materials. 460-461 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Ushiki K.Kawai,I.Ohshima,and T.Ohmi: "Chemical Reaction Concerns of Gate Metal with Gate Dielectric in Ta Gate MOS Devices : An Effect Of Self-Sealing Barrier Configuration Interposed Between Ta and"IEEE Trans.on Electron Devices. 47・11. 2201-2207 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Ushiki,H.Ishino,and T.Ohmi: "Effect of Starting SOI Material Quality on Low-Frequency Noise Characteristics in Partially Depleted Floating-Body SOI MOSFETs"IEEE Electron Device Letters. 21・12. 610-612 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Ohmi,S.Sugawa,K.Kotani,M.Hirayama,A.: "New Paradigm of Silicon Technology"IEEE Proceedings. 89・3(Now Printing). (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] A.Morimoto,K.Kotani,S.Sugawa,and T.Ohmi: "Interconnect and Substrate Structure for Giga-Scale Integration"Japanese Journal of Applied Physics. 40(Now Printing). (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Takeo Ushiki, Koji Kotani, Toshihiko Funaki, Kunihiro Kawai, and Tadahiro Ohmi: "Characterization of Electrically Active Defects at SOI-BOX Interface on High-Dose SIMOX Wafers"Precision Science and Technology for Perfect Surface, Proceedings of the 9th International Conference on Production Engineering (9th ICPE), Osaka, August-September. 567-572 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takeo Ushiki, Kunihiro Kawai, Ichiro Ohshima, and Tadahiro Ohmi: "Effect of in-situ Formed Interlayer at Ta-SiO2 interface on Performance and Reliability in Ta-Gate MOS Devices"Extended Abstract of the 1999 International Conferences on Solid State Devices and Materials, Tokyo, September. 178-179 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takeo Ushiki, Koji Kotani, Toshihiko Funaki, Kunihiro Kawai, and Tadahiro Ohmi: "Evidence of Energetically-Localized Trap-States at SOI-BOX Interface in High-Dose SIMOX Wafers"1999 IEEE International SOI Conference, Sonoma, CA, October. 48-49 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takeo Ushiki, Koji Kotani, Toshihiko Funaki, Kunihiro Kawai, and Tadahiro Ohmi: "New Aspects and Mechanism of Kink Effect in Static Back-Gate Transconductance Characteristics in Fully-Depleted SOI MOSFET's on High-Dose SIMOX Wafers"IEEE Trans.on Electron Devices. Vol.47, No.2. 360-366 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Akihiro Morimoto, Koji Kotani, Shigetoshi Sugawa, and Tadahiro Ohmi: "Interconnect and Substrate Structure for High Speed Giga-Scale Integration"Extended Abstract of the 2000 International Conferences on Solid State Devices and Materials, Sendai, August. 418-419 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Hiroyuki Shimada, Ichiro Ohshima, Takeo Ushiki, Shigetoshi Sugawa, and Tadahiro Ohmi: "Low Resistivity PVD TaNx/Ta/TaNx Stacked Metal Gate CMOS Technology Using Self-Grown bcc-Phased Tantalum on TaNx Buffer Layer"Extended Abstract of the 2000 International Conferences on Solid State Devices and Materials, Sendai, August. 460-461 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takeo Ushiki, Kunihiro Kawai, Ichiro Ohshima, and Tadahiro Ohmi: "Chemical Reaction Concerns of Gate Metal with Gate Dielectric in Ta Gate MOS Devices : An Effect Of Self-Sealing Barrier Configuration Interposed Between Ta and SiO2"IEEE Trans.on Electron Devices. Vol.47, No.11. 2201-2207 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takeo Ushiki, Hideaki Ishino, and Tadahiro Ohmi: "Effect of Starting SOI Material Quality on Low-Frequency Noise Characteristics in Partially Depleted Floating-Body SOI MOSFETs"IEEE Electron Device Letters. Vol.21, No.12. 610-612 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Tadahiro Ohmi, Shigetoshi Sugawa, Koji Kotani, Masaki Hirayama, Akihiro Morimoto: "New Paradigm of Silicon Technology"IEEE Proceedings. (Now Printing) Vol.89, No.3. (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Akihiro Morimoto, Koji Kotani, Shigetoshi Sugawa, and Tadahiro Ohmi: "Interconnect and Substrate Structure for Giga-Scale Integration"Japanese Journal of Applied Physics. (Now Printing) Vol.40. (2001)

    • Description
      「研究成果報告書概要(欧文)」より

URL: 

Published: 2002-03-26  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi