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2001 Fiscal Year Final Research Report Summary

Research on extremely low-power and scaled Si-based CMOS devices making the best use of SiGe and SOI

Research Project

Project/Area Number 11450142
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field 電子デバイス・機器工学
Research InstitutionShimane University

Principal Investigator

TSUCHIYA Toshiaki  Shimane Univ., Interdisciplinary Faculty of Science and Engineering, Professor, 総合理工学部, 教授 (20304248)

Co-Investigator(Kenkyū-buntansha) MATSUURA Takashi  Research Institute of Electrical Communication, Tohoku Univ., Associate Professor, 電気通信研究所, 助教授 (60181690)
MUROTA Junichi  Research Institute of Electrical Communication, Tohoku Univ., Professor, 電気通信研究所, 教授 (70182144)
Project Period (FY) 1999 – 2001
KeywordsSiGe / SOI / CMOS / hetero-structure / low power / high speed / low-frequency noise / hot carrier
Research Abstract

In this study, in order to realize future low-power and high-speed CMOS devices, we have tried to apply SiGe material and SOI (Silicon-on-Insulator) structure to Si CMOS, and have investigated the device performance, analyzed the characteristics, and developed new evaluation methods of the devices.
(1) It was confirmed that strained SiGe-channel pMOSFETs show twice higher transconductance compared with conventional counterparts.
(2) It was shown that drain leakage current in the SiGe-channel pMOSFETs increases with the increase in the SiGe thickness over a critical value. The mechanism of the leakage current was clarified, and guidelines for the Ge fraction and the SiGe thickness were obtained.
(3) 0.1-micron-gate pMOSFETs with raised source/drain structures and extremely-shallow source/drain junctions were fabricated using low-temperature doped-SiGe selective-epitaxial growth, and it was verified that the technique is effective to suppress short channel effects, and to obtain excellent drain drivability due to the low-resistance shallow source/drain structure.
(4) It was clarified that low-frequency noise in the SiGe-channel pMOSFETs, which is an important factor for their analogue applications, can be lower than that in conventional Si pMOSFETs.
(5) Hot-carrier-induced instability in Lorentzian-like excess low-frequency noise in floating-body SOI MOSFETs was found for the first time, and its mechanism was clarified.
(6) An experimental method to directly measure the interface-trap-density in the SiGe/Si heterostructure, which is introduced to the channel region in the SiGe-channel MOSFETs, was established by using the charge pumping technique. The method is effective to investigate the relationship between the device characteristics and the electrical quality of the heterostructure interface.

  • Research Products

    (14 results)

All Other

All Publications (14 results)

  • [Publications] T.Tsuchiya: "Drain Leakage Current and Instability of Drain Current in Si_<1-x>Ge_x MOSFETs"Thin Solid Films. 369. 379-382 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Tsuchiya: "Low Frequency Noise in Si_<1-x>Ge_x p-Channel Metal-Oxide-Semiconductor Field-Effect-Transistors"Jpn J. Appl. Phys, Part 1. 40. 5290-5293 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 土屋敏章: "SOI CMOSデバイス"日本信頼性学会 信頼性. 23. 229-241 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Yamashiro: "Super Self-Aligned Technology of Ultra-Shallow Junction in MOSFETs Using Selective Si_<1-x>Ge_x"Materials Science & Engineering B. 89. 120-124 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Tsuchiya: "Impact of Hot Carrier Stress on Low-Frequency Noise Characteristics in Floating-Body SOI MOSFETs"International Conf. on Solid State Devices and Materials, Extended Abstract. 272-273 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Tsuchiya: "Exploration of SiGe/Si Heterostructure Interface in SiGe-Channel MOSFETs"The Sixth Int'l Conference on Solid-State and Integrated-Circuit Technology Proceedings. 1. 575-579 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 土屋敏章: "SOI CMOSデバイスの基礎と応用"(株)リアライズ社. 113 (1999)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T. Tsuchiya, K. Goto, M. Sakuraba, T. Matsuura, and J. Murota: "Drain Leakage Current and Instability of Drain Current in Si_<1-x>Ge_x MOSFETs"Thin Solid Films. Vol. 369, no. 1-2. 379-382 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T. Tsuchiya, T. Matsuura, and J. Murota: "Low Frequency Noise in Si_<1-x>Ge_x p-Channel Metal-Oxide-Semiconductor Field-Effect-Transistors"Jpn J. Appl. Phys.. Vol. 40, Part 1, no. 9A. 5290-5293 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T. Tsuchiya: "SOI CMOS Devices"J. Reliability Engineering Association of Japan. Vol. 23, no. 2 (in Japanese). 229-241 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T. Yamashiro, T. Kikuchi, M. Ishii, F. Honma, M. Sakuraba, T. Matsuura, J. Murota, and T. Tsuchiya: "Super Self-Aligned Technology of Ultra-Shallow Junction in MOSFETs Using Selective Si_<1-x>Ge_x CVD."Materials Science & Engineering B. Vol. 89. 120-124 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T. Tsuchiya, T. Yosida, and Y. Sato: "Impact of Hot Carrier Stress on Low-Frequency Noise Characteristics in Floating-Body SOI MOSFETs"International Conf. on Solid State Devices and Materials, Extended Abstract. 272-273 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T. Tsuchiya, Y. Imada, and J. Murota: "Exploration of SiGe/Si Heterostructure Interface in SiGe-Channel MOSFETs"The Sixth Int' I Conference on Solid-State and Integrated- Circuit Technology Proceedings. 575-579 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T. Tsuchiya: "Principles and Applications of SOI CMOS Devices"REALIZE INC.. 113 (1999)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 2003-09-17  

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