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2003 Fiscal Year Final Research Report Summary

Verification methods of secure systems based on logical specifications

Research Project

Project/Area Number 12133204
Research Category

Grant-in-Aid for Scientific Research on Priority Areas

Allocation TypeSingle-year Grants
Review Section Science and Engineering
Research InstitutionTokyo Institute of Technology

Principal Investigator

YONEZAKI Naoki  Tokyo Institute of Technology, Graduate School of Information Science and Engineering, Professor, 大学院・情報理工学研究科, 教授 (00126286)

Co-Investigator(Kenkyū-buntansha) YOSHIURA Noriaki  Gunma University, Computer Center, Associate Professor, 総合情報処理センター, 助教授 (00302969)
NISHIZAKI Shin-ya  Tokyo Institute of Technology, Graduate School of Information Science and Engineering, Associate Professor, 大学院・情報理工学研究科, 助教授 (90263615)
YONEDA Tomohiro  National Institute of Informatics, Infrastructure Systems Research Division, Professor, 情報基盤研究系, 教授 (30182851)
TOMOISHI Masahiko  Tokyo Institute of Technology, Graduate School of Information Science and Engineering, Assistant Professor, 大学院・情報理工学研究科, 助手 (60262284)
Project Period (FY) 2000 – 2003
KeywordsSafety critical system / specification analysis / safe program synthesis / network security analysis / security protocol / secure system architecture / security of cryptographic primitives / verification and synthesis of hardware
Research Abstract

Our research results fall into fourfold.
1)Verification and synthesis method for keeping safety of reactive systems. We developed verification methods for specifications of reactive systems. These verification systems examine whether a specification satisfy the condition that for any infinite behavior of environment, the reactive system can properly react against it forever. We found various techniques for the implementation of an efficient verification system.
2) Network security. We defined an axiomatic system that can verify security properties of security protocols. Based on this inference rules, we also design construction rules for security protocols. By introducing several criteria of costs of protocols, optimized protocols are generated for each purpose. We also developed an analysis method for fairness of auction protocols. A new computational model is introduced, with which we can analyze the resistivity of the system for this kind of attack.
3) Construction of secure system arc … More hitecture. Once an intruder succeeds to get privilege of the super-user, he can easily intrude connecting other systems by abusing user switching mechanism. For this security problem, we gave a solution in which the user interfaces of other system components are unchanged but we introduced user authentication mechanism to the user switching mechanism. The intruder trying to avoid this mechanism is also detected in our system.
4) Fundamental theories. We analyzed various encryption schemes and hash functions in axiomatic way and strictly formalized various security properties e.g. partial information of contents in cipher text cannot leak out. We also proved their sufficient conditions. Analysis of such security properties in axiomatic way is new and is not found anywhere. For verification of reactive systems, we gave a proof method for temporal logic of finite frames and prove its completeness. It is not trivial to give the complete proof method because finiteness is not first order definable. Less

  • Research Products

    (92 results)

All Other

All Publications (92 results)

  • [Publications] Takenobu Aoshima, Naoki Yonezaki: "An efficient tableau-based verification method with partia evaluation for reactive system specifications"Proc.of The 10th European-Japanese Conf.On Information Modelling and Knowledge Bases. 337-348 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] V Vanitha, K.Yamashita, K.Fukuzawa, N.Yonezaki: "A method for structuralisation of evolutional specifications of reactive systems"ICSE 2000, The Third International Workshop on Intelligent Software Engineering (WISE3). 30-38 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriaki Yoshiura, Naoki Yonezaki: "Program synthesis for stepwise satisfiable specification of reactive system"International Sympo.on Principles of Software Evolution ISPSE 2000. 55-64 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masahiko Tomoishi, Naoki Yonezaki: "Evolutional tableau method for temporal logic specification"International Sympo.on Principles of Software Evolution ISPSE 2000. 181-188 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Takenobu Aoshima, Naoki Yonezaki: "Verification of reactive system specification with outer event conditional formula"International Sympo.on Principles of Software Evolution ISPSE 2000. 195-199 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 萩原茂樹, 友石正彦, 米崎直樹: "有限フレームを意味的基礎として持つ様相論理に対する分解証明法"コンピュータソフトウェア別冊ソフトウェア発展. 78-91 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 根岸和義, 米崎直樹: "セキュリティプロトコルの一貫性および正常終了一致の同一参加者による複数セッションを考慮した検証法"情報処理学会論文誌. 41(8). 2281-2290 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Negishi, K.and Yonezaki, N: "Verification method for possibility of parallel attack on multiple sessions with the same principals in a security protocol"Informal proceeding of Formal Method on Computer Security 2000. 109-120 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Tomohiro Yoneda: "VINAS-P : A tool for trace theoretic verification of timed asynchronous circuits"Proc.of Computer Aided Verification LNCS 1855. 572-575 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Yoshifumi Morihiro, Tomohiro Yoneda: "Verifying Stacks and Queues Using Symbolic Simulation Techniques"Proc.of 2000 International Workshop on RTL ATPG & DFT. 119-128 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Mart Saarepera, Tomohiro Yoneda: "Implementation of Quasi Delay-Insensitive Boolean Function Blocks"電子情報通信学会英文論文誌. E83-D(10). 1879-1889 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Yoshifumi Morihiro, Tomohiro Yoneda: "Formal Verification of Data-Path Circuits based on Symbolic Simulation"Proc.of 9th Asian Test Symposium. 323-339 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 須藤正人, 西崎真也: "名前呼び環境PCF計算の意味論"情報処理学会論文誌,プログラミング. 43(SIG3). 52-61 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Bin Zhou, Tomohiro Yoneda, Holier Schlingloff: "Conformance and Mirroring for Timed Asynchronous Circuits"Proc of ASP-DAC'01. 341-346 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 森広芳文, 米田友洋: "シミュレーションを利用した形式的検証システム"電子情報通信学会和文論文誌,D-I. J84-D-I(4). 367-377 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Yoneda, E.Mercer, C.Myers: "Modular Synthesis of Timed Circuits using Partial Order Reduction"Proc.of The 10th Workshop, on Synthesis And System Integration of Mixed Technologies. 151-158 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] E.Mercer, C.Myers, T.Yoneda: "Improved poset timing analysis in timed Petri nets"Proc.of The 10th Workshop on Synthesis And System Integration of Mixed Technologies. 127-134 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] B.Zhou, T.Yoneda, C.Myers: "Framework of Timed Trace Theoretic Verification Revisited"Proc.of 10th Asian Test Symposium. 437-442 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Kitai, T.Yoneda: "Partial order reduction in verification of wheel structured parameterized circuits"Proc.Of 2001 Pacific Rim International Symposium on Dependable Computing. 173-182 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Aoshima, K.Sakuma, N.Yonezaki: "An efficient verification procedure supporting evolution of reactive system specifications"International Workshop on Principles of Software Evolution 2001. 182-185 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] K.Masui, M.Tomoishi, N.Yonezaki: "Design of UNIX system for the prevention of damage propagation by intrusion"Lecture Notes in Computer Science 2200, Proceedings of Information Security Conference. 536-552 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriaki Yoshiura: "Evolution Mechanism of Reactive System Programs"Proc.of International Workshop on Principles of Software Evolution 2001. 170-173 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriaki Yoshiura, Naoki Yonezaki: "Provability of relevant logic ER"Proc.of The 11th European-Japanese conf. on Information Modelling and Knowledge Basis. 90-104 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Aoshima, T.Ando, N.Yonezaki: "Consistency Checking of Behavioural Modeling in UML Statechart Diagrams"European Japanese Conference on Information modelling and Knowledge bases. 179-196 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Y Morihiro, T Yoneda: "Formal Verification of Data-Path Circuits based on Symbolic Simulation"電子情報通信学会英文論文誌. E85-D(6). 965-974 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Yoneda, T.Kitai, C.Myers: "Automatic Derivation of Timing Constraints by Failure Analysis"Proc.of Computer Aided Verification. 195-208 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] B.Zhou, T.Yoneda, C.Myers: "Framework of Timed Trace Theoretic Verification Revisited"電子情報通信学会英文論文誌. E85-D(10). 1595-1604 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Yoneda, E.Mercer, C.Myers: "Modular Synthesis of Timed Circuits using Partial Order Reduction"電子情報通信学会英文論文誌. E85-D(12). 2684-2692 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Kitai, Y Oguro, T.Yoneda, E.Mercer, C.Mvers: "Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method"Proc.of 2002 Pacific Rim International Symposium on Dependable Computing. 210-218 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 蜷川忠三, 青井文男, 横浜浩二, 米田友洋: "空調制御ネットワークにおける信号極性確定の分散アルゴリズム"電気学会論文誌C. 123(5). 919-927 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] H.Zheng, C.Myers, D.Walter, S.Little, T.Yoneda: "Verification of Timed Circuits with Failure Directed Abstractions"Proc of 2003 International Conference on Computer Design. 28-35 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Curtis Nelson, Chris Myers, Tomohiro Yoneda: "Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits"Proc of 2003 International Conference on Computer Aided Design. 424-431 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Kitai, Y Oguro, T.Yoneda, E.Mercer, C.Myers: "Partial Order Reduction for Timed Circuit Verification Based on a Level Oriented Model"電子情報通信学会英文論文誌. E86-D(12). 2601-2611 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Tomohiro Yoneda, Hiroomi Onda, Chris Myers: "Synthesis of Speed Independent Circuits Based on Decomposition"Proc.of Tenth International Sympo.on Advanced Research in Asynchronous Circuits and Systems. (印刷中). (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] T.Aoshima, T.Ando, N.Yonezaki: "Consistency Checking of Behavioural Modeling in UML Statechart Diagrams"Information Modelling and Knowledge Bases XIV. 152-169 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 青島武伸, 米崎直樹: "時間論理によるリアクティブシステム仕様の検証の効率化"コンピュータソフトウェア. 20(3). 30-53 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "Judgment Deduction System of Asymmetric Encryption Scheme (JDE-system)"PreProc.of WISA 2003, The 4th International Workshop on Information Security Applications. 639-649 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "The Characterization of Cryptographic Primitives and Their Security Properties"Proceedings of the Ninth International Conference on Distributed Multimedia Systems. 636-642 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "A Formal System for Analysis of Cryptographic encryption and Their Security properties"International Symposium on Software Security 2003. (印刷中). (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "A Formal Analysis of Symmetric Encryption and Keyed and Keyed Hash Function"The 46th IEEE International Midwest Symposium On Circuits & Systems 2003. (印刷中). (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 増井健司, 友石正彦, 米崎直樹: "SSLとリレーサーバを用いたPOP before SMTPのセキュアな実現法"電子情報通信学会誌. J86-DI(4). 260-268 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Shin-ya Nishizaki, Naoki Uesugi: "Secure Filtering of Client-Side Scripts by Program Transformation"Information Technology Letters. 37-39 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Shin-ya Nishizaki: "Secure Execution of Client-Side Scripts by Program Transformation in an HTTP Proxy Server"International Workshop on FORMAL METHODS and SECURITY. (印刷中). (2004)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Daigo Tomioka, Shin-ya Nishizaki, Ritsuya Ikeda: "Cost estimation calculus for analyzing denial-of service attack resistance"International Symposium on Software Security 2003. (印刷中). (2004)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriaki Yoshiura: "Logic of Relevant Connectives for Knowledge Base Reasoning"Information modeling and knowledge bases XIV. 66-80 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriaki Yoshiura: "Decision Procedures for Several Properties of Reactive System Specification"International Symposium on Software Security 2003. (印刷中). (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Takenobu Aoshima, Naoki Yonezaki: "An efficient tableau-based verification method with partia evaluation for reactive system specifications"Proc. of The 10th European-Japanese Conf. On Information Modelling and Knowledge Bases. 337-348 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] V.Vanitha, K.Yamashita, K.Fukuzawa, N.Yonezaki: "A method for structuralisation of evolutional specifications of reactive systems"ICSE2000, The Third International Workshop on Intelligent Software Engineering (WISE3). 30-38 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Noriaki Yoshiura, Naoki Yonezaki: "Program synthesis for stepwise satisfiable specification of reactive system"International Sympo. on Principles of Software Evolution ISPSE. 2000. 55-64 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masahiko Tomoishi, Naoki Yonezaki: "Evolutional tableau method for temporal logic specification"International Sympo. on Principles of Software Evolution ISPSE. 2000. 181-188 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Tankenobu Aoshima, Naoki Yonezaki: "Verification of reactive system specification with outer event conditional formula"International Sympo. on Principles of Software Evolution ISPSE. 2000. 195-199 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Shigeki Hagihara, Masahiko Tomoishi, Naoki Yonezaki: "Unification-based Resolution Method for Modal Logic with Finite Frames"Computer Software, Software Evolution. 78-91 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Kazuyoshi Negishi, Naoki Yonezaki: "Verification Method for Consistency and Normal Termination Agreement on Multiple Sessions with the Same Principals in a Security Protocol"IPSJ Journal. Vol.41, No.08. 2281-2290 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Negishi, K., Yonezaki, N: "Verification method for possibility of parallel attack on multiple sessions with the same principals in a security protocol"Informal proceeding of Formal Method on Computer Security. 2000. 109-120 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Tomihiro Yoneda: "VINAS-P : A tool for trace theoretic verification of timed asynchronous circuits"Proc. of Computer Aided Verification, LNCS. 1855. 572-575 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Yoshifumi Morihiro, Tomohiro Yoneda: "Verifying Stacks and Queues Using Symbolic Simulations Techniques"Proc. of 2000 International Workshop on RTL ATPG & DFT. 119-128 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Mart Saarepera, Tomohiro Yoneda: "Implementation of Quasi Delay-Insensitive Boolean Function Blocks"The Trans. Of the institute of Electronics, Information and communication Engineers. E83-D(10). 1879-1889 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Yoshifumi Morihiro, Tomohiro Yoneda: "Formal Verification of Data-Path Circuits based on Symbolic Simulation"Proc. of 9th Asian Test Symposium. 323-339 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Maato Suto, Shin-ya Nishizaki: "Semantics of Call-by-name Environment Calculus"IPSJ Transactions on Programming. Vol.41, No.SIG03. 52-61 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Bin Zhou, Tomohiro Yoned: "Holger Schlingloff, Conformance and Mirroring for Timed Asynchronous Circuits"Proc. of ASP-DAC'01. 341-346 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Yoshifumi Morihiro, Tomohiro Yoneda: "Formal Verification System based on Simulation"IEICE Trans. D-I. Vol.J84-D-I, No.4. 367-377 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Yoneda, E.Mercer, C.Myers: "Modular Synthesis of Timed Circuits using Partial Order Reduction"Proc. of The 10th Workshop on Synthesis And System Integration of Mixed Technologies. 151-158 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] E.Mercer, C.Myers, T.Yoneda: "Improved poset timing analysis in timed Petri nets"Proc. of The 10th Workshop on Synthesis And System Integration of Mixed Technologies. 127-134 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] B.Zhou, T.Yoneda, C.Myers: "Framework of Timed Trace Theoretic Verification Revisited"Proc. of 10th Asian Test Symposium. 437-442 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Kitai, T.Yoneda: "Partial order reduction in verification of wheel structured parameterized circuits"Proc. Of 2001 Pacific Rim International Symposium on Dependable Computing. 173-182 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Aoshima, K.Sakuma, N.Yonezaki: "An efficient verification procedure supporting evolution of reactive system specifications"International Workshop on Principles of Software Evolution 2001. 182-185 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] K.Masui, M.Tomoishi, N.YOnezaki: "Design of UNIX system for the prevention of damage propagation by intrusion"Lecture Notes in Computer Science 2002, Proceedings of Information Security Conference. 536-552 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Noriaki Yoshiura: "Evolution Mechanism of Reactive System Programs"Proc. of International Workshop on Principles of Software Evolution 2001. 170-173 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Noriaki Yoshimura, Naoki Yonezaki: "Provability of relevant logic ER"Proc. of The 11th European-Japanese conf. on Information Modelling and Knowledge Basis. 90-104 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Aoshima, T.Ando, N.Yonezaki: "Consistency Checking of Behavioural Modeling in UML Statechart Diagrams"European Japanese Conference on Information modelling and Knowledge bases. 179-196 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Y.Morihiro, T.Yoneda: "Formal Verification of Data-Path Circuits based on Symbolic Simulation"The Trans. Of the institute of Electronics, Information and communication Engineers. E85-D(6). 965-974 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Yoneda, T.Kitai, C.Myers: "Automatic Derivation of Timing Constraints by Failure Analysis"Proc. of Computer Aided Verification. 195-208 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] B.Zhou, T.Yoneda, C.Myers: "Framework of Timed Trace Theoretic Verification Revisited"The Trans. Of the institute of Electronics, Information and communication Engineers. E85-D(10). 1595-1604 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Yoneda, E.Mercer, C.Myers: "Modular Synthesis of Timed Circuits using Partical Order Reduction"The Trans. Of the institute of Electronics, Information and communication Engineers. E85-A(12). 2684-2692 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Kitai, Y.Oguro, T.Yoneda, E.Mercer, C.Myers: "Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method"Proc. of 2002 Pacific Rim International Symposium on Dependable Computing. 210-218 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Chuzo Ninagawa, Fumio Aoi, Koji Yokohama, Tomohiro Yoneda: "Distributed Algorithm for Signal Polarity Adjustment of Air-Conditioner Control Network"IEEJ Trans.. Vol.123, No.5. 912-927 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] H.Zheng, C.Myers, D.Walter, S.Little, T.Yoneda: "Verification of Timed Circuits and Failure Directed Abstractions"Proc of 2003 International Conference on Computer Design. 28-35 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Curtis Nelson, Chris Myers, Tomohiro Yoneda: "Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits"Proc of 2003 International Conference on Computer Aided Design. 424-31 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Kitai, Y.Oguro, T.Yoneda, E.Mercer, C.Myers: "Partial Order Reduction for Timed Circuit Verification Based on a Level Oriented Model"The Trans. Of the institute of Electronics, Information and communication Engineers. E86-D(12). 2601-2611 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Tomohiro Yoneda, Hiroomi Onda, Chris Myers: "Synthesis of Speed Independent Circuits Based on Decomposition"Proc. of Tenth International Sympo. on Advanced Research in Asynchronous Circuits and Systems. (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takenobu Aoshima, Naoki Yonezaki: "An Efficient Method for Verification of Reactive System Specifications in Temporal Logic"Computer Software. Vol.20, No.3. 30-53 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Aoshima, T.Ando, N.Yonezaki: "Consistency Checking of Behavioural Modeling in UML Statechart Diagrams"Information Modelling and Knowledge BasesXIV. 152-169 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "The Characterization of Cryptographic Primitives and Their Security Properties"Proceedings of the Ninth International Conference on Distributed Multimedia Systems. 636-642 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "The Characterization of Cryptographic Primitives and Their Security Properties"Proceedings of the Ninth International Conference on Distributed Multimedia Systems. 636-642 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "A Formal System for Analysis of Cryptographic encryption and Their Security Properties"International Symposium on Software Security 2003. (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Ashraf Bhery, Shigeki Hagihara, Naoki Yonezaki: "A Formal Analysis of Symmetric Encryption and Keyed and Keyed Hash Function"The 46th IEEE International Midwest Symposium On Circuits & Systems 2003. (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Kenji Masui, Masahiko Tomoishi, Naoki Yonezaki: "Secure Implementation Method of POP before SMTP Using a Relay Server with SSL Protocol"The Trans of IEICE. Vol.J86-D-I, No.4. 260-268 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Shin-ya Nishizaki, Naoki Uesugi: "Secure Filtering of Client-Side Scripts by Program Transformation"Information Technology Letters. 37-39 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Shin-ya Nishizaki: "Secure Execution of Client-Side Scripts by Program Transformation in an HTTP Proxy Server"International Workshop on FORMAL METHODS and SECURITY. (2004)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Daigo Tomioka, Shin-ya Nishizaki, Ritsuya Ikeda: "Cost estimation calculus for analyzing denial-of-service attack resistance"International Symposium on Software Security 2003. (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Noriaki Yoshiura: "Logic of Relevant Connectives for Knowledge Base Reasoning"Information modeling and knowledge bases XIV. 66-80 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Noriaki Yoshiura: "Decision Procedures for Several Properties of Reactive System Specification"International Symposium on Software Security 2003. (2003)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 2005-04-19  

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