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2002 Fiscal Year Final Research Report Summary

Development of VLSI Processor Chip Family for Highly-Safe Intelligent Vehicles Based on Optimal Design Mythologies

Research Project

Project/Area Number 12555119
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section展開研究
Research Field Control engineering
Research InstitutionTohoku University

Principal Investigator

KAMEYAMA Michitaka  Tohoku University, Graduate School of Information Sciences, Professor, 大学院・情報科学研究科, 教授 (70124568)

Co-Investigator(Kenkyū-buntansha) HARIYAMA Masanori  Tohoku University, Graduate School of Information Sciences, Associate Professor, 大学院・情報科学研究科, 助教授 (10292260)
Project Period (FY) 2000 – 2002
KeywordsIntelligent Integrated Systems for Real-World Applications / High-Level Synthesis / Scheduling / Allocation / Low-Power VLSI Processor / Logic-In-Memory Architecture / Highly-Safe Intelligent Vehicle
Research Abstract

Intelligent vehicle applications are expected to be one of promising future system LSI applications. If these applications become realistic, any real-worldapplications will be posslit1e. As typical case studies, intelligent vehicle applications are useful to develop a high-level synthesis methology of system LSI. From the point of view, the following technologies are studied
1. VLSI chip family for intelligent vehicles
The highest performance VLSI chip family is developed for highly-safe intelligent vehicles. These are VLSI processors for stereo vision, optical-flow extraction, path planning and trajectory perdition based on probabilistic inference. These VLSI-oriented algorithms are also discussed to reduce the computational complexity. Moreover, a high-performance field-programmable VLSI which is very superior to the conventional FPGAS is developed
2. System integration and intelligent algorithms
Sensing of environment information and prediction of the dynamic change are very important t … More echnologies to realize real-world applications. A system integration methology is developed considering measurement and prediction errors. The condition of a sampling period is discussed based on a real-world signal processing model.
3. Design theory of VLSI processors
One of the most serious problems in recent VLSI systems is large delay due to interconnection complexity between memories and processing elements. To solve the problem, a parallel processing module composed of a processing element and a local memory is defined as a basic building block to make interconnection delay as small as possible. Still, there exists propagation delay for data transfer between the modules. A high-level synthesis method considering the data transfer time is discussed on the hardware model, when a data-dependency graph corresponding to a processing algorithm is given. We must simultaneously consider both scheduling and allocation for the time optimization problem under a constraint of achip area. A branch and bound method and a genetic algorithm are effectively employed to find an optimum solution. Extension of the above methologies is also considered to solve the following general problems
・Minimization of processing under chip area constraint
・Minimization of chip area under processing time constraint
・Minimization of dissipation energy under processing time and chip area constraint Less

  • Research Products

    (46 results)

All Other

All Publications (46 results)

  • [Publications] 張山 昌論, 李 昇桓, 亀山充隆: "転送ボトルネックのないセンサ・メモリアーキテクチャに基づくモーションステレオVLSIプロセッサの構成"電気学会論文誌Vol.120-E, No.5,pp.237-243(2000). Vol.120-E, No.5. 237-243 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Toshiki Takeuchi, Michitaka Kameyama: "Reliable Stereo Matching for Highly-Safe Intelligent Vehicles and Its VLSI Implementation"Proceedings of the IEEE Intelligent Vehicles 2000. 128-133 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Hideki Kazama, Michitaka Kameyama: "VLSI Processor for Hierarchical Template Matching and Its Application to a Ball-Catching Robot System"IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS). 613-618 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Toshiki Takeuchi, Michitaka Kameyama: "VLSI-Oriented Algorithm for Reliable Stereo Matching"IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS). 625-630 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Seunghwan Lee, Masanori Hariyama, Michitaka Kameyama: "an FPGA-Oriented Motion-Stereo Processor with a Simple Interconnection Network for Parallel Memory Access"IEICE Trans. INF. & Syst. Vol. E83-D, No.12. 2122-2130 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 工藤隆男, 羽生貴弘, 亀山充隆: "ロジックインメモリアーキテクチャに基づく道路抽出VLSIプロセッサの構成"計測自動制御学会論文集. 36,11. 1009-1018 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Michitaka Kameyama: "Stereo Vision VLSI Processor Based on Pixel-Serial and Window-Parallel Architecture"Journal of Robotics and Mechatronics. Vol.12,No.5. 521-526 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Michitaka Kameyama: "Path Planning Based on Distance Transformation and Its VLSI Implementation"Journal of Robotics and Mechatronics. Vol.12,No.5. 527-533 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Hideki Kazama, Masanori Hariyama, Michitaka Kameyama: "Design of a VLSI Processor Based on an Immediate Output Generation Scheduling for Ball-Trajectory Prediction"Journal of Robotics and Mechatronics. Vol.12,No.5. 534-540 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 亀山充隆, 張山昌論: "リアルワールド応用知能集積システムの展望"計測と制御. Vol.40,No.12. 841-847 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Seunghwan Lee, Michitaka Kameyama: "Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme"IEICE Trans. Electron. Vol. E84-C, No.3. 382-389 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 張山 昌論, 山口 文武, 亀山 充隆: "読み出し専用連想メモリを用いた高速軌道計画VLSIプロセッサの試作"計測自動制御学会論文集. 37,3. 235-241 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Toshiki Takeuchi, Michitaka Kameyama: "VLSI Processor for Reliable Stereo Matching Based on Adaptive Window-Size Selection"Proc. International Conference on Robotics and Automation. 1168-1173 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 張山 昌論, 亀山 充隆: "障害物の階層的表現に基づく高安全自動車用衝突チェックVLSIプロセッサの設計"電気学会論文誌. Vol.121-C, No.6. 1016-1025 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 張山 昌論, 工藤隆男, 亀山 充隆: "最適アロケーションに基づく道路抽出VLSIプロセッサとその高安全知能自動車への応用"電子情報通信学会論文誌. Vol. J84-D-I, No.6. 531-539 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Michitaka Kameyama, Masanori Hariyama: "Design Methodology for Human-Oriented Intelligent Integrated Systems"Interdisciplinary Information Science. Vol.7,No.2. 279-287 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Michitaka Kameyama: "Pixel-Serial and Window-Parallel VLSI Processor for Stereo Matching Using a Variable Window Size"Interdisciplinary Information Science. Vol.7,No.2. 289-297 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 亀山充隆: "未来情報社会を創る知能集積システム"東北大学大学院電気・情報系および電気通信研究所編:個性の輝くコミュニケーション-21世紀への夢-,東北大学出版会. 126-154 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 大澤尚学, 張山昌論, 亀山充隆: "コントロール/データフローグラフの直接アロケーションに基づくフィールドプログラマブルVLSIプロセッサ"電子情報通信学会論文誌. Vol. J85-C, No.5. 384-392 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Naotaka Ohsawa, Masanori Hariyama, Michitaka Kameyama: "High-Performance Field programmable VLSI Processor Based on a Direct Allocation of a Control/Data Flow Graph"IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002). 95-100 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Michitaka Kameyama: "Optical Flow Extraction Based on Reuse of Intermediate Results and VLSI Implementation"Proc. SICE2002. 2366-2369 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Naotaka Ohsawa, Masanori Hariyama, Michitaka Kameyama: "Architecture of a Field-Programmable VLSI Processor Using Memory-Based Cells"Proc.SICE2002. 2370-2373 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Michitaka Kameyama, Masanori Hariyama: "VLSI Computing and System Integration for Real-World Applications"2002 International Symposium on New Paradigm VLSI Computing. 13-16 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Hariyama, Lee Seunghwan and Michitaka Kameyama: "design of a Motion Stereo VISI Processor Based on a Transfer Bottleneck-Free Sensor/Memory Architecture"Trans. IEE Japan. 120-E, No. 5. pp. 237-243 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Toshiki Takeuchi and Michitaka Kameyama: "Reliable Stereo Matching for Highly-Safe Intelligent Vehicles and Its VLSI Implementation"Proceedings of the IEEE Intelligent Vehicles 2000. pp. 128-133 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Hideki Kazama and Michitaka Kameyama: "VLSI Processor for Hierarchical Template Matching and Is Application to a Ball-Catching Robot System"IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS). pp. 613-618 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Toshiki Takeuchi and Michitaka Kameyama: "VLSI-Oriented Algorithm for Reliable Stereo Matching"IEEE International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS). pp. 625-630 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Seunghwan Lee, Masanori Hariyama and Michitaka Kameyama: "an FPGA-Oriented Motion-Stereo Processor with a Simple Interconnection Network for Parallel Memory Access"IEICE Trans. INF. & Syst.. Vol. E83-D, No.12. pp. 2122-2130 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takao Kudoh, Takahiro Harryu and Michitaka Kameyama: "design of a Parallel VLSI Processor for Road Extraction Based on Logic-in-Memory Architecture"Trans. SICE. 36, 11. pp. 1009-1018 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama and Michitaka Kameyama: "Stereo Vision VLSI Processor Based on Pixed-Serial and Window-Parallel Architecture"Journal of Robotics and Mechatronics. 12,5. pp. 521-526 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama and Michitaka Kameyama: "Path Planning Based on distance Transformation and Its VLSI Implementation"Journal of Robotics and Mechatronics. 12,5. pp. 527-533 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Hideki Kazama, Masanori Hariyama and Michitaka Kameyama: "Design of a VLSI Processor Based on an Immediate Output Generation Scheduling for Ball-Trajectory Prediction"Journal of Robotics and Mechatronics. 12,5. pp. 534-540 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Michitaka Kameyama and Masanori Hariyama: "Prospects of Intelligent Integrated Systems for Real-World Applications"Journal of the Society of Instrument and Control Engineers. 40,12. pp. 841-847 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Seunghwan Lee and Michitaka Kameyama: "Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme"IEICE Trans. Electron. E84-C, No. 3. pp. 382-389 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Fumitake Yamaguchi and Michitaka Kameyama: "Implementation of an Ultra-High-Speed Path planning VLSI Processor Using a ROM-Type Content-Addressable Memory"Trans. SICE. 37, 3. pp. 235-241 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Toshiki Takeuchi and Michitaka Kameyama: "VLSI Processor for Reliable Stereo Matching Based on Adaptive Window-Size Selection"Proc. International Conference on Robotics and Automation. pp. 1168-1173 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama and Michitaka Kameyama: "Design of a Collision Detection VLSI Processor for Highly Safe Intelligent Vehicles Based on Hierarchical Obstacle Representation"Trans. IEE. 121-C, 6. pp. 1016-1025 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama, Takao Kudoh and Michitaka Kameyama: "Road Extraction VLSI Processor Based on an Optimal Allocation and Its Application to Highly-Safe Intelligent Vehicles"Trans. IEICE. J84-D-I,6. pp. 531-539 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Michitaka Kameyama and Masanori Hariyama: "Desigo Methodology for Human-Oriented Intelligent Integrated Systems"Interdisciplinary Information Sciences. 7,21. pp. 279-287 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama and Michitaka Kameyama: "Pixel-Serial and Window-Parallel VLSI Processor for Stereo Matching Using a Variable Window Size"Interdisciplinary Information Sciences. 7, 2. pp. 289-297 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Michitaka Kameyama: "Intelligent Integrated Systems for Creation of Future Information Society"Tohoku Univ. Pub.. pp. 126-125 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Naotaka Ohsawa, Masanori Hariyama and Michitaka Kameyama: "Field Programmable VLSI Processor Based on Direct Allocation of a Control/Data Flow Graph"Trans. IEICE. J85-C, .5. pp. 384-392 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Naotaka Ohsawa, Masanori Hariyama and Michitaka Kameyama: "High-Performance Field Programmable VLSI Processor Based on a Direct Allocation of a Control/Data Flow Graph"IEEE Computer Society Annual Symposium on VLSI.. pp. 95-100 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Masanori Hariyama and Michitaka Kameyama: "Optical Plow Extraction Based on Reuse of Intermediate Results and VLSI Implementation"Proc. SINCE2002. pp. 2366-2369 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Naotaka Ohsawa, Masanori Hariyama and Michitaka Kameyama: "Architecture of a Field-Programmable VLSI Processor Using Memory-Based Cells"Proc. SINCE2002. pp. 2370-2373 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Michitaka Kameyama and Masanori Hariyama: "VLSI Computing and System Integration for Real-World Applications"2002 International Symposium on New Paradigm VLSI Computing. pp. 13-16 (2002)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 2004-04-14  

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