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2002 Fiscal Year Final Research Report Summary

Development of a Cluster Computing System for Evolutionary Synthesis of Hardware Algorithms

Research Project

Project/Area Number 12558024
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section展開研究
Research Field 計算機科学
Research InstitutionTohoku University

Principal Investigator

AOKI Takafumi  Tohoku University, Graduate School of Information Sciences, Professor, 大学院・情報科学研究科, 教授 (80241529)

Project Period (FY) 2000 – 2002
KeywordsEvolutionary Computation / Genetic Algorithms / Genetic Programming / Cluster Computing / Parallel Processing / Hardware Algorithms / VLSI / Logic Synthesis
Research Abstract

This research project is to investigate a possibility of designing arithmetic circuits automatically by employing a new evolutionary optimization, technique called Evolutionary Graph Generation(EGG). Listed below are major results of this project :
1. A parallel EGG system based on the coarse-grained model of parallel processing was developed for synthesizing arithmetic circuits efficiently.
2. An experimental 11-node Linux PC cluster was built for implementing the parallel EGG system.
3. A new version of EGG system that can be used to synthesize heterogeneous networks of various different components such as analog/digital-mixed components was proposed. The new EGG system with terminal-color constraint was proved to be useful for reducing search space of possible circuit configurations.
4. The performance of the developed EGG system was evaluated through a set of experiments for synthesizing various arithmetic circuits including constant-coefficient multipliers, constant-coefficient multiply-adders, bit-serial adders, bit-serial constant-coefficient multipliers, bit-seril constant-coefficient multiply-adders and current-mode logic circuits. Our observation shows that EGG is suitable for circuit design problems that can be handled by circuit graphs with up to 50 nodes.
5. A new evolutionary operation called "transmigration" was investigated for accelerating EGG's evolution process.
Further investigations on a general-purpose EGG framework for practical applications are being left as future research subjects.

  • Research Products

    (18 results)

All Other

All Publications (18 results)

  • [Publications] Naofumi Homma: "Evolutionary Graph Generation System with Symbolic Verification for Arithmetic Circuit Design"Electronics Letters. 36・11. 937-939 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Naofumi Homma: "Evolutionary Synthesis of Fast Constant-Coefficient Multipliers"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E83-A・9. 1767-1777 (2000)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Natsui: "Parallel Evolutionary Graph Generation with Terminal-Color Constraint and Its Application to Current-Mode Logic Circuit Design"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A・9. 2061-2071 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Natsui: "Evolutionary Graph Generation with Terminal-Color Constraint for Heterogeneous Circuit Synthesis"Electronics Letters. 37・13. 808-810 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Masanori Natsui: "Evolutionary Graph Generation System with Terminal-Color Constraint --An Application to Multiple-Valued Logic Circuit Synthesis --"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E84-A・11. 2808-2810 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Dingjun Chen: "Pragmatic Method for the Design of Fast Constant-Coefficient Combinational Multipliers"IEE Proceedings --Computers and Digital Techniques. 148・6. 196-206 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Dingjun Chen: "Parallel Evolutionary Design of Constant-Coefficient Multipliers"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A・2. 508-512 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Dingjun Chen: "Graph-Based Evolutionary Design of Arithmetic Circuits"IEEE Transactions on Evolutionary Computation. 6・1. 86-100 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Naofumi Homma: "Evolutionary Graph Generation System with Transmigration Capability and Its Application to Arithmetic Circuit Synthesis"IEE Proceedings -Circuits, Devices and Systems. 149・2. 97-104 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] N. Homma, T. Aoki and T. Higuchi: "Evolutionary Graph Generation System with Symbolic Verification for Arithmetic Circuit Design"Electronics Letters. 36,.11. 937-939 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] N. Homma, T. Aoki and T. Higuchi: "Evolutionary Synthesis of Fast Constant-Coefficient Multipliers"IEICE Transactionson Fundamentals of Electronics, Communications and Computer Sciences. E83-A, No.9. 1767-1777 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] M. Natsui, T. Aoki and T. Higuchi: "Evolutionary Graph Generation with Terminal-Color Constraint for Heterogeneous Circuit Synthesis"Electronics Letters. 37,13. 808-810 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] M. Natsui, T. Aoki and T. Higuchi: "Evolutionary Graph Generation System with Terminal-Color Constraint ba― An Application to Multiple-Valued Logic Circuit Synthesis―"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E84-A, 11. 2808-2810 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] D. Chen, T. Aoki, N. Homma and T. Higuchi: "Pragmatic Method for the Design of Fast Constant-Coefficient Combinational Multipliers"IEE Proceedings - Computers and Digital Techniques. Vol.148.6. 196-206 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] D. Chen, T. Aoki, N. Homma and T. Higuchi: "Parallel Evolutionary Design of Constant-Coefficient Multipliers"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A,2. 508-512 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] D. Chen, T. Aoki, N. Homma, T. Terasaki and T. Higuchi: "Graph-Based Evolutionary Design of Arithmetic Circuits"IEEE Transactions on Evolutionary Computation. 6,1. 86-100 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] N. Homma, T. Aoki and T. Higuchi: "Evolutionary Graph Generation System, with Transmigration Capability and Its application to Arithmetic Circuit Synthesis"IEE Proceedings-Circuits, Devices and Systems. 149,2. 97-104 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] M. Natsi, T. Aoki and, T. Higuchi: "Parallel Evolutionary Graph Generation with Terminal-Color Constraint and Its Application to Current-Mode Logic Circuit Design"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A,9. 2061-2071 (2002)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 2004-04-14  

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