2002 Fiscal Year Final Research Report Summary
Study on extremely thin barriers in low-resistivity against Cu interconnect on field oxide layer of SiO_2
| Project/Area Number |
12650299
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | Kitami Institute of Technology |
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Principal Investigator |
NOYA Atsushi K.I.T. Electrical and Electronic Engineering, Prof., 工学部, 教授 (60133807)
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| Co-Investigator(Kenkyū-buntansha) |
TAKEYAMA Mayumi K.I.T. Electrical and Electronic Engineering, Assoc. Prof., 工学部, 助教授 (80236512)
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| Project Period (FY) |
2000 – 2002
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| Keywords | Integrated Circuits / Interconnects / Barrier / nano-crystal |
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| Research Abstract |
In the interconnecting technology for system-ULSI's in future, extremely thin barriers in low-resistivity acceptable to the 65nm rule were desired for reducing the RC signal delay in the system. We examined the possible barrier materials from the points of view of (1) low-resistive barrier, (2) barrier for Cu[111] preferred orientation and (3) extremely thin barrier in the model system of Cu/barrier/SiO_2/Si. We proposed the use of Ta-W alloy to avoid the high-resistive tetragonal polymorphic phase in Ta, and confirmed the low-resistive barrier on which Cu[111] texture was formed. From this result, Nb as a bcc metal was examined as the barrier on which Cu[111] texture was obtained, and the successful formation of preferentially oriented Cu[111]/Nb[110]/SiO_2/Si system was confirmed. We also applied a nano-crystalline VN film to a barrier as thin as 〜10nm against Cu on SiO_2. The excellent barrier performance without any diffusion of Cu through the thin VN barrier due to annealing at 600℃ for 1h was obtained. Furthermore, the high performance of 〜5nm thick VN barrier was also suggested.
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