2002 Fiscal Year Final Research Report Summary
Realization of homogeneous dislocation distribution in a buffer layer by self-organization
| Project/Area Number |
13650009
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Applied materials science/Crystal engineering
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| Research Institution | Shizuoka University |
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Principal Investigator |
TAKANO Yasushi Shizuoka University, Electrical and Electronic Engineering, Associate Professor, 工学部, 助教授 (00197120)
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| Co-Investigator(Kenkyū-buntansha) |
SUMIYA Masatomo Shizuoka University, Electrical and Electronic Engineering, Research Associate, 工学部, 助手 (20293607)
FUKE Shunro Shizuoka University, Electrical and Electronic Engineering, Professor, 工学部, 教授 (00022236)
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| Project Period (FY) |
2001 – 2002
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| Keywords | MOCVD / indium gallium arsenic / graded layer / cross-hatched pattern / gallium arsenic substrate / dislocation / misoriented substrate / transmission electron microscopy |
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| Research Abstract |
InGaAs layers have been grown on GaAs substrates by metalorganic vapor phase epitaxy (MOVPE). Graded layers were used as buffer layers. InGaAs layers with high In composition were prepared on misoriented GaAs substrates where a smooth surface morphology was obtained for low In composition InGaAs layers. At 600 ℃ where GaAs epitaxial layers were usually grown, an extremely rough surface was obtained for an InGaAs layer with In composition of 0.5. Around 600 ℃, no mirror surface was achieved for InGaAs layers with In composition of 0.5 by optimizing growth conditions such as gas flow rates. Cross sectional TEM (transmission electron microscopy) observation showed that misfit dislocations in the buffer layer over In composition of 0.4 were not parallel to the surface of the GaAs substrate. Residual strain in the buffer layer increased with the In composition.
High temperature growth would reduced a residual strain in an epitaxial layer. But at high temperature, a thick graded buffer layer is required because the surface becomes rough even under a small residual strain. This leads to a high cost. Therefore we investigated a low growth temperature conditions to suppress the surface roughening. When temperature was decreased from 600 ℃ for InGaAs layers with In composition of 0.5, the surface became rough. The degradation was found to be due to a high residual strain and a phase separation. No mirror surface was obtained at between 500 and 600 ℃. As the temperature was decreased from 500 ℃, the surface was found to become smooth. A mirror surface was achieved at 450 ℃. Cross sectional TEM confirmed that the top InGaAs layer contained a few threading dislocations. Misfit dislocations in the buffer layer ran parallel to the interface. Photoluminescence (PL) measurement showed a strong PL emission, which meaned a high crystalline quality for the top InGaAs layer.
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Research Products
(6 results)
