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2003 Fiscal Year Final Research Report Summary

Research on Compilers that can Adaptively Adopt Optimizations

Research Project

Project/Area Number 13680397
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field 計算機科学
Research InstitutionThe University of Tokyo

Principal Investigator

SATO Hiroyuki  The University of Tokyo, Information Technology Center, Associate Professor, 情報基盤センター, 助教授 (20225999)

Co-Investigator(Kenkyū-buntansha) KURODA Hisayasu  The University of Tokyo, Information Technology Center, Research Associate, 情報基盤センター, 助手 (60323507)
KANADA Yasumasa  The University of Tokyo, Information Technology Center, Professor, 情報基盤センター, 教授 (90115551)
Project Period (FY) 2001 – 2003
KeywordsCompiler Optimization / Loop Unrolling / Performance Predication / Type System / Verification of Optimization / Optimization Verifying Compiler / Grid / Distributed Environment
Research Abstract

This research aims at Adaptive Optimization in compilation. Today, computing platforms are diverging. They include uniprocessor computer of Pentium and RISC' s, small scale SMP, large scale parallel systems, and heterogeneous GRID environment. It is strongly required that we can make programs in uniform programming model, and that compilers can take care of getting. best performance on each platform. As its result, optimizers in a compiler is heavily responsible for good performance. However, in today's complexity of computer/network/software architecture, heavy analysis is necessary to improve performance. In this research, we have studied
(1) a performance model that has accuracy in performance analysis. Specifically, we have built unrolling shape, a symbolic and quantitative performance model for loop unrolling, for both in-order and out-of-order processors. This model is proved to be accurate enough to capture CPU behaviors in loop unrolling such as effect of software pipelining and memory latency hiding.
(2) adaptive selection of algorithms in accordance with characteristics of numerical data structure This selection is applied in installation time, compile time, and runtime. We observed performance improvement using this adaptive algorithm selection.
As two essential requirements to optimizations, we can list that they do not change program semantics and that they truly improve performance. As Optimization Verifying Compiler Project, we are trying to guarantee the two requirements. The fact that we have studied adaptation for improving performance in this research can be a stepping stone to this end.

  • Research Products

    (32 results)

All Other

All Publications (32 results)

  • [Publications] Taguchi, Kenji, Sato, Hiroyuki: "TeleLog : A Mobile Logic Language"Proc.Joint Symp.Parallel Processing 2001 (IPSJ). 213-220 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Sato, Hiroyuki: "Array Form Representation of Idiom Recognition System for Numerical Programs"Proc.Int'l Conf.Array Programming Languages 2001 (APL2001)(ACM). 85-96 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 吉田映彦, 佐藤周行: "ループアンローリングの特徴抽出とそのモデル化"情報処理学会論文誌:プログラミング. 42(SIG7). 1-11 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Nanri, Takeshi, Sato, Hiroyuki, Shimasaki, Masaaki: "Design and Implementation of an Adaptive Distributed Memory System"Proc.13^<th> Int'l Conf.Parallel and Distributed Computing and Systems 2001 (IASTED). 629-634 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Sato, Hiroyuki: "MetaCompiler : A Compiler System on Grid-like MetaComputing Environment"Proc.HPC Asia 2001. (CDROM). (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Sato, Hiroyuki, Yoshida Teruhiko: "Characteristics of Loop Unrolling Effect : Software Pipelining and Memmory Latency Hiding"Proc.2001 Innovative Architecture for Future Generation High-Performance Processors and System (IEEE). 63-72 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 片桐孝洋, 黒田久泰, 大沢清, 工藤誠, 金田康正: "自動チューニング機構が並列数値計算ライブラリに及ぼす効果"情報処理学会論文誌:ハイパフォーマンスコンピューティング. 42(SIG12(HPS4). 60-76 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Sato, Hiroyuki, Yoshida, Teruhiko: "Unrolling Shape : Symbolic and Quantitative Analysis of Loop Unrolling Effect"Proc.6^<th> Int'l Conf.Software Engneering and Applications 2002 (IASTED). 755-760 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Kuroda, Hisayasu, Katagiri, Takhiro, Kanada, Yasumasa: "Knowledge Discovery in Auto-tuning Parallel Numerical Library"Progress in Discovery Science, Final Report of the Japanese Discovery Science Project (LNCS2281). 628-639 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Kudo, Makoto, Kuroda, Hisayasu, Katagiri, Takahiro, Kanada, Yasumasa: "Optimal Algorithm Selection of Parallel Sparse Matrix-Vector Multiplication Is Important"Proc.Vector and Parallel Processing 2002. 43-55 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Matsuno, Yutaka, Sato, Hiroyuki: "Flow Analytic Type System for Array Bound Checks"Elec.Notes.Theoretical Computer Science (Proc.CATS2003). (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Sato, Hiroyuki: "Hem(π)-Heterogeneous MPI Environment on Grid"Proc.15^<th> Int'l Conf.Parallel and Distributed Computing and Systems. 660-665 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Sato, Hiroyuki: "Unrolling Shape for Out-of-Order Processors"Proc.2003 Innovative Architecture for Future Generations High-Performance Processors and Systems. 88-97 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Makoto Kudoh, Hisayasu Kuroda, Yasumasa Kanada: "Parallel Blocked Sparse Matrix-Vector Multiplication with Dynamic Parameter Selection Method"Proc Int'l Conf.Computational Science 2003. III. 581-591 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Matsuno, Yutaka, Sato, Hiroyuki: "A Type System for Optimization Verifying Compilers"Proc.6^<th> JSSST Workshop on Programming and Programming Languages 2004. 77-89 (2004)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Matsuno, Yutaka, Sato, Hiroyuki: "A Type System for Verification of Compiler Optimization"情報処理学会論文誌:プログラミング. (to appear).

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] TAGUCHI, K., Sato H.: "Telelog : A Mobile Logig Language"Proc.Joint Symp.Parallel Processing 2001. 213-220 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] SATO, H.: "Array From Representation of Idiom Recognition System for Numerical Programs"Proc.Int'l Conf.Array Programming Languages 2001. 85-96 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] YOSHIDA, T., SATO, H.: "Characteristics Extraction of Loop Unrolling and Its Modeling (In Japanese)"Trans.IPSJ on Programming. 42(SIG7)(PRO11). 1-11 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] NANRI, T., SATO, H., SHIMASAKI, M.: "Design and Implemetation of an Adaptive Distributed Memory System"Proc.13^<th> Int'l Conf. Parallel and Distributed Computing and Systems.. 629-634 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] SATO, H.: "Metacomplier : A Compiler System on Grid-like MetaComputing Environment"Proc.HPC Asia 2001. (CD-ROM). (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] SATO, H., YOSHIDA, T.: "Characterization of Loop Unrolling Effect : Software Pipelining and Memory Latency Hiding"Proc.2001 Innovative Architecture for Future Generations High-Performance Processors and Systems.. 63-72 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] KATAGIRI, T., KURODA, H., OHSAWA, K., KUDOH, M., KANADA, Y.: "Impact of Auto-tuning Facilities for Parallel Numerical Library (In Japanese)"Trans.IPSJ on High Performance Processors and Systems.. 42(SIG12)(HPS4). 60-76 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] SATO, H., YOSHIDA T.: "Unrolling Shape : Symbolic and Quantitative Analysis of Loop Unrolling Effect"Proc.6^<th> Int'l Conf.Software Engineering and Applications. 755-760 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] KURODA, H., KATAGIRI, T., KANADA, Y.: "Knowledge Discovery in Auto-tuning Parallel Numerical Library"Progress in Discovery Science, Final Report of the Japanese Discovery Science Project (LNCS2281). 628-639 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] KUDOH, M., KURODA, H., KATAGIRI, T., KANADA, Y.: "Optimal Algorithm Selection of Parallel Sparse Matrix-Vector Multiplication Is Important"Proc.Vector and Paralle Processing 2002.. 43-55 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] MATSUNO, Y., SATO, H.: "Flow Analytic Type System for Array Bound Checks"Elec. Notes on Theoretical Computer Science. 78. (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] SATO, H.: "Hem(pi) : --Heterogeneous MPI Environment on Grid."Proc. 15^<th> Int'l Conf. Parallel and Distributed Computing and Systems. 660-665 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] SATO, H.: "Unrolling Shape for Out-of-Order Processors"Proc. 2003 Innovative Architecture for Future Generations High-Performance Processors and Systems. 88-97 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] KUDOH, M., KUEODA, H., KANADA, Y.: "Parallel Blocks Sparse Matrix-Vector Multiplication with Dynamic Parameter Selection Method"Proc. Int'l Conf. Computional Science 2003. III. 581-591 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] MATSUNO, Y., SATO, H.: "A Type System for Optimization Verifying Compilers"Proc. 6^<th> JSSST Workshop on Programming and Programming Languages 2004. 77-89 (2004)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] MATSUNO, Y., SATO, H.: "A Type System for Verification of Compiler Optimizations"Trans. IPSJ : Programming. (to appear).

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 2005-04-19  

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