2005 Fiscal Year Final Research Report Summary
Study of Interface Control in Ultra-thin High-k Film on Silicon Substrate
| Project/Area Number |
13852009
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| Research Category |
Grant-in-Aid for Scientific Research (S)
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| Allocation Type | Single-year Grants |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | The University of Tokyo |
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Principal Investigator |
TORIUMI Akira The University of Tokyo, School of Engineering, Professor, 大学院・工学系研究科, 教授 (50323530)
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| Co-Investigator(Kenkyū-buntansha) |
KYUNO Kentaro The University of Tokyo, School of Engineering, Lecturer, 大学院・工学系研究科, 講師 (40251467)
KITA Kita The University of Tokyo, School of Engineering, Research Associate, 大学院・工学系研究科, 助手 (00343145)
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| Project Period (FY) |
2001 – 2005
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| Keywords | high-k dielectrics / hafnium oxide / yttrium oxide / lanthanum oxide / silicon / germanium / polarizability / amorphous |
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| Research Abstract |
This research target was to scientifically judge the possibility of usability of ultra-thin high-k dielectric films for next generation CMOS ULSI. Main results obtained are described below.
1.Understanding of origin of high dielectric constants of high-k materials proposed and constructing a guiding principle of high-k materials design.
(1)Phonon modes of high-k materials have been clearly provided using far-infrared absorption analysis.
(2)Y or Si doping into HfO2 can enhance the dielectric constant (〜30) through the phase transformation.
(3)La doping can enhance crystallization temperature as well as dielectric constant.
(4)The dielectric constants were quantitatively analyzed through both molar volume change and molar polarizability and a guiding principle for designing high-k dielectrics was proposed.
2.Understanding and control of high-k/Si interface layer
(1)The interface layer growth at HfO2/Si was modeled as parameters of substrate orientation, oxidation time, and temperature. This fact has clarified that high-k/Si interface layer growth mechanism is significantly different from Si surface oxidation.
(2)By taking account of atomic oxygen as oxidation species the interface layer growth model was quantitatively constructed and a guiding principle for the interface layer control was proposed.
Based upon those results, we challenged to demonstrate sub-nm EOT high-k oxides. Though still some optimization was needed for the interface characteristics improvement, we have achieved high-k gate stack with EOT=0.8 nm and 5 orders smaller leakage current compared to SiO2 case. Thus, the numerical target of this research has been fully achieved.
Furthermore, high-k dielectrics on Ge were also partly studied and new features of this system, particularly in the interface layer, have been observed. This result provides us a new research target for the next generation ULSI devices.
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[Patent(Industrial Property Rights)] 特許2005
Inventor(s)
鳥海明, 喜多浩之, 富田一行, 山本芳樹
Industrial Property Rights Holder
国立大学法人東京大学
Industrial Property Number
国際出願PJT/JP2005?015702
Filing Date
2005-08-30
Description
「研究成果報告書概要(和文)」より
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