2004 Fiscal Year Final Research Report Summary
Reduction Techniques for Digital Substrate Noise on Mixed-Signal Integrated Circuits
| Project/Area Number |
14350195
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
情報通信工学
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
TAKAGI Shigetaka Tokyo Institute of Technology, Professor, 大学院・理工学研究科, 教授 (10187932)
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| Co-Investigator(Kenkyū-buntansha) |
FUJII Nobuo Tokyo Institute of Technology, Professor, 大学院・理工学研究科, 教授 (00016601)
WADA Kazuyuki Toyohashi University of Technology, Lecturer, 情報工学系, 講師 (00302943)
SATO Takahide Tokyo Institute of Technology, Research Associate, 大学院・理工学研究科, 助手 (10345390)
TAKAGI Shigetaka Tokyo Institute of Technology, Professor (10187932)
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| Project Period (FY) |
2002 – 2004
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| Keywords | System on Chip / Digital Substrate Noise / Automatic Control / Layout |
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| Research Abstract |
Demands on high performance mixed-signal integrated circuits are increasing because of the advancing of multimedia technologies. Periodical behavior of digital circuits produces what so called digital substrate noise. This noise will deteriorate analog circuit performance and is a big problem to be solved.
A passive guard ring has been commonly used to reduce the substrate fluctuation. However, it only suppresses the noise coupled through a substrate surface and has quite small effect on noise transfered through the deep portion of a substrate. This project proposes an active shield circuit to solve digital substrate noise problem. The proposed active shield circuit will generate an inverting signal to the digital noise and cancel out it. To improve cancellation performance layout of the active shield circuit, analog circuits and digital circuits is considered, and an automatic control technique is proposed. The validity of the proposed techniques is confirmed through experiments and simulations.
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Research Products
(4 results)
