2003 Fiscal Year Final Research Report Summary
Study on Ultra High-bandwidth Interconnect Circuits for System-on-a-chip
| Project/Area Number |
14550325
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | KYUSHU INSTITUTE OF TECHNOLOGY |
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Principal Investigator |
NAKAMURA Kazuyuki Kyushu Institute of Technology, Center for Microelectronic Systems, Associate Professor, マイクロ化総合技術センター, 助教授 (60336097)
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| Co-Investigator(Kenkyū-buntansha) |
YOSHIDA Mika Kyushu Institute of Technology, Center for Microelectronic Systems, Assistant Professor, マイクロ化総合技術センター, 助手 (50336096)
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| Project Period (FY) |
2002 – 2003
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| Keywords | System-on-A-Chip / System-LSI / Interface / Communication / device variataion / image Processing / non-volatile memory / PLL |
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| Research Abstract |
According to the shrink of CMOS process technology and enlargement of the chip area, there are many serious problems in recent CMOS LSI design; such as process variations, device defects, costs for design and test. In order to avoid these problems, 2-demensional structure using functional macro blocks is considered as a promising candidate of a future LSI configuration. However the key in this structure is how to realize the high-bandwidth interconnections among these macros. In this study, both High-speed analog circuit design technology and large-scale memory design technology are employed to develop the novel interconnect technology.
As a result, 1)new high-bandwidth interconnect circuits which uses 4-voltage-level was developed. It includes process variation detector to stabilize the output voltage level. 2)The test chip was also developed via VDEC to demonstrate the usefulness of this new circuit. The 4-volatege-level operation was confirmed by the measured results. 3)A quantitive analysis system using image processing for non-volatile memories was also developed to evaluate process variation.
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