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2019 Fiscal Year Final Research Report

Hardware Design Methodology to Utilize Next-Generation Device That May Not Work Properly

Research Project

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Project/Area Number 15H02679
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system
Research InstitutionRitsumeikan University

Principal Investigator

YAMASHITA Shigeru  立命館大学, 情報理工学部, 教授 (30362833)

Co-Investigator(Kenkyū-buntansha) 原 祐子  東京工業大学, 工学院, 准教授 (20640999)
冨山 宏之  立命館大学, 理工学部, 教授 (80362292)
Project Period (FY) 2015-04-01 – 2020-03-31
KeywordsApproximate Computing / Stochastic Computing / 設計理論
Outline of Final Research Achievements

When we design a circuit with unreliable devices, the circuit may output wrong values for certain input patterns. Even so, when such errors can be ignored, we can still use such circuits. Thus, we studied many aspects of Approximate Computing to find various results concerning how we can tolerate some errors. For example, we found an efficient way to design approximate multipliers that have a good trade-off between an image discrimination rate and hardware costs (area and speed) when we develop hardware CNNs for recognizing handwritten characters. Moreover, we also develop an design method for Stochastic Computing such that we can decrease the hardware cost while we keep the calculation errors low.

Free Research Field

LSI設計

Academic Significance and Societal Importance of the Research Achievements

信頼性は低いが超小型・超低消費電力などの特性を持つ次世代の素子が将来的に利用できるようになった時には、それを十分に使いこなす設計技術が必要である。具体的には、ばらつきがある素子を利用するために、誤動作する可能性がある回路をそのエラーを許容しながらどのように利用するかという設計指針が必要となる。そのために、本研究により得られたApproximate ComputingやStochastic Computingの分野における様々な設計指針が有用となると期待できる。

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Published: 2021-02-19  

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