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2016 Fiscal Year Final Research Report

Self-assembled monolayer-based gate dielectrics in MIS structure and its application to functional nano-electronic devices

Research Project

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Project/Area Number 15H06204
Research Category

Grant-in-Aid for Research Activity Start-up

Allocation TypeSingle-year Grants
Research Field Electron device/Electronic equipment
Research InstitutionTokyo Institute of Technology

Principal Investigator

Kawanago Takamasa  東京工業大学, 科学技術創成研究院, 助教 (30726633)

Research Collaborator Oda Shunri  
Du Wanjing  
Ikoma Ryo  
Project Period (FY) 2015-08-28 – 2017-03-31
Keywords自己組織化単分子膜 / 二硫化モリブデン / 電界効果トランジスタ / 界面特性
Outline of Final Research Achievements

In this study, we apply self-assembled-monolayer (SAM)-based gate dielectrics to the fabrication of molybdenum disulfide (MoS2) field-effect transistors. A simple fabrication process involving the selective formation of a SAM on metal oxides in conjunction with the dry transfer of MoS2 flakes was established. A subthreshold slope (SS) of 69 mV/dec and no hysteresis were demonstrated with the ultrathin SAM-based gate dielectrics accompanied by a low gate leakage current. The small SS and no hysteresis indicate the superior interfacial properties of the MoS2/SAM structure. Cross-sectional transmission electron microscopy revealed a sharp and abrupt interface of the MoS2/SAM structure. The SAM-based gate dielectrics are found to be applicable to the fabrication of low-voltage MoS2 field-effect transistors and can also be extended to various layered semiconductor materials. This study opens up intriguing possibilities of SAM-based gate dielectrics in functional electronic devices.

Free Research Field

半導体電子工学

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Published: 2018-03-22  

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