Development of Highspeed Silicon Monolithic Optical Receiver using CMOS Processes

2017 Fiscal Year Final Research Report

• Project/Area Number: 15K06012
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Kanazawa University
• Principal Investigator: Maruyama Takeo 金沢大学, 電子情報学系, 准教授 (60345379)
• Project Period (FY): 2015-04-01 – 2018-03-31
• Keywords: 光集積回路 / 光検出器 / 光導波路 / シリコンフォトニクス

Outline of Final Research Achievements

We propose the SOI-PIN photodiodes. It is expected that the devices are operated at over 20 GHz by optimizing electrode spacing, receiving size and pad size. The devices are fabricated by foundry service. The devices were measured at the wavelength of 0.8 um region. The maximum bandwidth of 13 GHz was obtained at the electrode spacing of 0.6 um, receiving size of 20×20 um2 and pad size of 30×30 um2.
We proposed a design of waveguide type polarization splitter based on directional coupler which is advantageous in terms of size. It was confirmed by FDTD analysis that it can be realized by setting the combination of coupling length to 1: 2. Furthermore, we fabricated devises using foundry service and report results of measured polarization characteristics. From the result of the measurement, it was confirmed that this device was operating and an extinction ratio of 20 dB or more was obtained.

Free Research Field

工学