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2017 Fiscal Year Final Research Report

A Research on FPGA Accelerator for Large-Scale Applications

Research Project

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Project/Area Number 15K12001
Research Category

Grant-in-Aid for Challenging Exploratory Research

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionUniversity of Tsukuba

Principal Investigator

Tsutomu Maruyama  筑波大学, システム情報系, 教授 (00292532)

Project Period (FY) 2015-04-01 – 2018-03-31
KeywordsFPGA / DRAM / ソーティング / 高速計算 / インタリーブ
Outline of Final Research Achievements

In this research, we propose an FPGA computational model for problems that require many off-chip memory accesses. In this model, (1) many threads are processed in parallel on the FPGA, (2) memory access from each thread is grouped dynamically according to its target memory bank number, (3) the memory interface achieves the maximum throughput by accessing the banks in turn, and (4) the fetched data are sent back to the thread that issued the request. We examined the effectiveness of this model through the evaluation of several real applications.

Free Research Field

リコンフィギャラブルコンピューティングシステム

URL: 

Published: 2019-03-29  

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