Reliability prediction using manufacturing test results of VLSIs

2017 Fiscal Year Final Research Report

• Project/Area Number: 15K12004
• Research Category: Grant-in-Aid for Challenging Exploratory Research
• Allocation Type: Multi-year Fund
• Research Field: Computer system
• Research Institution: Kyushu Institute of Technology
• Principal Investigator: Kajihara Seiji 九州工業大学, 大学院情報工学研究院, 教授 (80252592)
• Co-Investigator(Kenkyū-buntansha): 大竹 哲史 大分大学, 理工学部, 准教授 (20314528)
• Research Collaborator: SATO Yasuo 九州工業大学, 大学院情報工学研究院, 客員教授 ; NAKAMURA Yoshiyuki ルネサスエレクトロニクス(株), オートモーティブソリューション事業本部, 主任技師
• Project Period (FY): 2015-04-01 – 2018-03-31
• Keywords: LSIテスト / テストコスト削減 / データマイニング / アダプティブテスト / バーインテスト

Outline of Final Research Achievements

In this research, we proposed a test cost reduction method, which tries to predict final test results on the way of test process, using machine learning techniques for the huge measurement data obtained from manufacturing test of VLSIs. We also developed new evaluation measures to evaluate the effect of test cost reduction. Furthermore, we discussed on judging VLSIs which are easy to progress aging. Experimental results obtained through test data for industrial dies showed that the proposed method could improve predictability with high test cost reduction capability significantly. In addition, we confirmed the difference of aging speed produced by the difference of circuit structure by an experiment for TEG chips.

Free Research Field

LSIテスト