2017 Fiscal Year Final Research Report
Pulse power application of SiC power devices with ultra-low loss and high switching speed
Project/Area Number |
15K13927
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Research Category |
Grant-in-Aid for Challenging Exploratory Research
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Allocation Type | Multi-year Fund |
Research Field |
Power engineering/Power conversion/Electric machinery
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Research Institution | University of Yamanashi |
Principal Investigator |
YANO Koji 山梨大学, 大学院総合研究部, 教授 (90252014)
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Co-Investigator(Kenkyū-buntansha) |
山本 真幸 山梨大学, 大学院総合研究部, 助教 (00511320)
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Co-Investigator(Renkei-kenkyūsha) |
TANAKA Yasunori 産業技術総合研究所, 先進パワーエレクトロニクス研究センター, 総括研究主幹 (20357453)
YATSUO Tsutomu 産業技術総合研究所, 先進パワーエレクトロニクス研究センター, 非常勤研究員 (10399503)
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Project Period (FY) |
2015-04-01 – 2018-03-31
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Keywords | パワーデバイス / パルスパワー / SiC |
Outline of Final Research Achievements |
The SiC-buried gate static induction transistor (SiC-BGSIT) was investigated for a switching device in a pulse power generator, and then device simulations made clear its electrical properties in an inductive energy storage circuit as a result of an optimum design of the BGSIT structure. It was made clear than the power loss per pulse can be reduced by 75% when the loss of the SiC-BGSIT is compared with that of the Si-static induction thyristor (SIThy). This effect can successfully contribute to the reduction of the size of the pulse generator. In order to improve the performance of the SIC-BGSIT, the SiC screen grid vertical JFET, in which the screed grid regions are introduced underneath the buried p+ gate stripes of the BGSIT, was proposed. It was experimentally demonstrated that 3A-1,2kV SGVJFETs have a fall time less than 50ns during the turnoff period.This result suggests that the SGVJFET structure enhances the dV/dt in the voltage pulse.
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Free Research Field |
半導体工学
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