Quasi-three-dimensional integration using time-domain interconnection

2016 Fiscal Year Final Research Report

• Project/Area Number: 15K13962
• Research Category: Grant-in-Aid for Challenging Exploratory Research
• Allocation Type: Multi-year Fund
• Research Field: Electron device/Electronic equipment
• Research Institution: Tohoku University
• Principal Investigator: Kotani Koji 東北大学, 工学研究科, 准教授 (20250699)
• Project Period (FY): 2015-04-01 – 2017-03-31
• Keywords: 疑似三次元集積 / 集積回路 / 時間軸配線

Outline of Final Research Achievements

In this study, as a novel integrated circuit architecture, a quasi-3D integration scheme, in which time domain is taken as a new integration dimension and combined with a conventional physical 2D integration of the integrated circuit technology, has been established and its effectiveness has been evaluated. Taking multiple-stage 2D image processing circuits as a specific evaluation example, a quasi-3D signal processing architecture composed of an array of unit processing nodes and temporary memory elements acting as time-domain interconnects has been developed. Its superior performance against the conventional parallel processing architecture, in which multiple signal processing layers are simply placed in a 2D integration plane, has been demonstrated.

Free Research Field

工学