On-Line Masking of Periodic Multiple Transient Faults under Highly Electromagnetic Environments

2017 Fiscal Year Final Research Report

• Project/Area Number: 15K21413
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Computer system; Power engineering/Power conversion/Electric machinery
• Research Institution: Nihon University
• Principal Investigator: ARAI Masayuki 日本大学, 生産工学部, 准教授 (10336521)
• Project Period (FY): 2015-04-01 – 2018-03-31
• Keywords: 同時多重過渡故障 / 双対近似回路 / クリティカルエリア / インバータスイッチングノイズ / 高電磁環境

Outline of Final Research Achievements

In this study we proposed a scheme to detect transient faults occurring in logic circuits, which are caused by switching noises of DC-AC inverters. We introduce dual approximate logic, which combines the concepts of approximate logic that is partially equivalent to the original circuit, and of dual logic. We used simulations for small benchmark and sample circuits to evaluate the effectiveness of the proposed scheme in terms of detection capability.
We also studied fast test pattern generation based on critical area, in order to specify and test target circuit which is protected by dual approximated logic. By combining 2-step test generation and window-based searching, the proposed scheme achieved 40% of pattern count reduction, as well as 10x speed-up.

Free Research Field

ディペンダブルコンピューティング