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2006 Fiscal Year Final Research Report Summary

Study on physical models for understanding the properties of strained-Si MOS Transistors

Research Project

Project/Area Number 16206029
Research Category

Grant-in-Aid for Scientific Research (A)

Allocation TypeSingle-year Grants
Section一般
Research Field Electronic materials/Electric materials
Research InstitutionThe University of Tokyo

Principal Investigator

TAKAGI Shinichi  The University of Tokyo, Graduate School of Frontiers Science, Professor (30372402)

Project Period (FY) 2004 – 2006
Keywordsstrained-Si / MOSFET / mobility / tunneling current / Coulomb scattering / gate current / substrate current / subband structure
Research Abstract

The effects of the channel strain on the electrical characteristics of MOSFETs have not been fully understood yet in spite of the importance. Thus, the establishment of the physical models to describe the electrical properties is of paramount importance. In this study, following issues have been clarified by the analyses using bi-axial tensile strain Si MOSFETs.
* It has been found that inversion-layer electron and hole mobility do hold the universality against the effective field with the value of η of 1/2 and 1/3, respectively, as similar with unstrained-Si n-and p-MOSFETs.
* It has been found that gate current of n-MOSFETs under the positive bias, attributed to tunneling of electrons from the inversion layers, decreases with an increase in bi-axial tensile strain. We have demonstrated that this tunnel current reduction is quantitatively explained by the increase in the barrier height between Si and SiO2, caused by the lowering of the conduction band edge due to the tensile strain.
* It has been found that the density and the energy distribution of interface states, generated by FN stress injection, do not change with applying tensile strain to channels, while the threshold voltage shift of n-MOSFETs after the stressing does change with strain because of the reduction in the band bending under the inversion condition in strained-Si nMOSFETs.
* While electron mobility limited by Coulomb scattering due to substrate impurities in Si n-MOSFETs increases with an increase in tensile strain, the electron mobility limited by Coulomb scattering due to interface charges does decrease. These results are explained by the reduction in the averaged conductivity mass and the increase in the scattering probability with interface Coulomb scattering centers, both of which are provided by the increase in the occupancy of the 2-fold valley electrons due to applying tensile strain.

  • Research Products

    (18 results)

All 2008 2007 2006 2005

All Journal Article (16 results) (of which Peer Reviewed: 1 results) Book (2 results)

  • [Journal Article] Carrier-transport-enhanced channel CMOS for improved power consumption and performance2008

    • Author(s)
      S.Takagi, T.Irisawa, T.Tezuka, T.Numata, S.Nakaharai, N.Hirashita, Y.Moriyama, K.Usuda, E.Toyoda, S.Dissanayake, M.Shichijo, R.Nakane, S.Sugahara, M.Takenaka and N.Suiama
    • Journal Title

      IEEE Transactionon Eectron Devices Vol.55,Issue.1

      Pages: 21-39

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Carrier-transport-enhanced channel CMOS for improved power consumption and performance2008

    • Author(s)
      S. Takagi, T. Irisawa, T. Tezuka, T. Numata, S. Nakaharai, N. Hirashita, Y. Moriyama, K. Usuda, E. Toyoda, S. Dissanayake, M. Shichijo, R. Nakane, S. Sugahara, M. Takenaka and N. Sugiyama
    • Journal Title

      IEEE Trans. Electron Devices Vol.55, Issue. 1

      Pages: 21-39

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Effect of Tensile Strain on Gate Current of strained-Sin-MOSFETs2007

    • Author(s)
      T.Hoshii, S.Sugahara and S.akagi
    • Journal Title

      Jpn.J.Appl.Phys. Vol・46,No.4B

      Pages: 2122-2126

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Device structures and carrier transport properties of advanced CMOS using high mobility channels2007

    • Author(s)
      S. Takagi, T. Tezuka, T. Irisawa, S. Nakaharai, T. Numata, K. Usuda, N. Sugiyama, M. Shichijo, R. Nakane, S. Sugahara
    • Journal Title

      Solid-State Electronics Vol.51

      Pages: 526-536

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Effect of Tensile Strain on Gate Current of strained-Si n-MOSFETs2007

    • Author(s)
      T. Hoshii, S. Sugahara and S. Takagi
    • Journal Title

      Jpn. J. Appl. Phys Vol.46

      Pages: 2122-2126

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Performance Enhancement of Partially and Fully Depleted Strained-S0I MOSFETs2006

    • Author(s)
      T.Numata, T.Irisawa, T.Tezuka, J.Koga, N.Hirashita, K.Usuda, E.Toyoda, Y.Miyamura, A.Tanabe, N.Sugiyama and S.Takagi
    • Journal Title

      IEEE Transaction on Eectron Devices Vol.52,Issue.8

      Pages: 1030-1038

    • Description
      「研究成果報告書概要(和文)」より
    • Peer Reviewed
  • [Journal Article] Device structures and carrier transport properties of advanced CMOS using high mobility channels2006

    • Author(s)
      S.Takagi, T.Tezuka, T.Irisawa, S.Nakaharai, T.Numata, K.Usuda, N.Sugiyama, M.Shichijo, R.Nakane, S.Sugahara
    • Journal Title

      Solid-State Electronics Vol.51

      Pages: 526-536

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Performance Enhancement of Partially and Fully Depleted Strained-SOI MOSFETs2006

    • Author(s)
      T. Numata, T. Irisawa, T. Tezuka, J. Koga, N. Hirashita, K. Usuda, E. Toyoda, Y. Miyamura, A. Tanabe, N. Sugiyama and S. Takagi
    • Journal Title

      IEEE Trans. Electron Devices Vol.53, Issue. 5

      Pages: 1030-1038

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Subband Structure Engineering for Advanced CMOS Channels2005

    • Author(s)
      S.Takagi, T.Mizuno, T.Tezuka, N.Sugiyama, S.Nakaharai, T.Numata, J.Kogaand.K.Uchida
    • Journal Title

      Solid State Electronics Vol.49,Issue5

      Pages: 684-694

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] On the Origin of Increase in Substrate Current and Impact lonization Efficiency in Strained Si n-and p-MOSFETs2005

    • Author(s)
      T.Irisawa, T.Numata, N.Sugiyama and S.Takagi
    • Journal Title

      IEEE Transaction on Eectron Devices Vol.52,Issue.5

      Pages: 993-998

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Control of Threshold Voltage and Short Channel Effects in Ultra-thin Strained-SOl CMOS Devices2005

    • Author(s)
      T.Numata, T.Mizuno, T.Tezuka, J.Koga and S.Takagi
    • Journal Title

      IEEE Transaction on Eectron Devices Vol.52,Issue.8

      Pages: 1780-1786

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Si系高移動度MOSトランジスタ技術2005

    • Author(s)
      高木 信一
    • Journal Title

      応用物理 74巻・9号

      Pages: 1158-1170

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Subband Structure Engineering for Advanced CMOS Channels2005

    • Author(s)
      S. Takagi, T. Mizuno, T. Tezuka, N. Sugiyama, S. Nakaharai, T. Numata, J. Koga and K. Uchida
    • Journal Title

      Solid State Electron. Vol.49, Issue 5

      Pages: 684-694

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] 0n the Origin of Increase in Substrate Current and Impact Ionization Efficiency in Strained Si n- and p-MOSFETs2005

    • Author(s)
      T. Irisawa, T. Numata, N. Sugiyama and S. Takagi
    • Journal Title

      IEEE Trans. Electron Devices Vol.52, Issue 5

      Pages: 993-998

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Control of Threshold Voltage and Short Channel Effects in Ultra-thin Strained-SOI CMOS Devices2005

    • Author(s)
      T. Numata, T. Mizuno, T. Tezuka, J. Koga and S. Takagi
    • Journal Title

      IEEE Trans. Electron Devices Vol.52, Issue 8

      Pages: 1780-1786

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Si-based high mobility MOS transistor technologies2005

    • Author(s)
      S. Takagi
    • Journal Title

      Oyo Buturi Vol.74

      Pages: 1158-1170

    • Description
      「研究成果報告書概要(欧文)」より
  • [Book] Electronic Devices Architectures for the NANO-CMOS Era-From Ultimate CMOS Scaling to Beyond CMOS devices2008

    • Author(s)
      S.Takagi, T.Tezuka, T.Irisawa, S.Nakaharai, T.Numata, K.Usuda, N.Sugiyama, M.Shichijo, R.Nakaneand S.Sugahara
    • Publisher
      will be published in)Pan Stanford Publishing
    • Description
      「研究成果報告書概要(和文)」より
  • [Book] Advanced Gate Stacks for High-Mobility Semiconductors (Springer Series in Advanced Microelectronics 27)(Chapter 1:Strained-Si CMOS Technology)2007

    • Author(s)
      S.Takagi
    • Total Pages
      383(chpt.1:19)
    • Publisher
      Springer
    • Description
      「研究成果報告書概要(和文)」より

URL: 

Published: 2010-02-04  

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