Development of On-chip Nano-Scale Network Based on Communication Theory

2007 Fiscal Year Final Research Report Summary

• Project/Area Number: 16206034
• Research Category: Grant-in-Aid for Scientific Research (A)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Tokyo Institute of Technology
• Principal Investigator: MASU Kazuya Tokyo Institute of Technology, Integrated Research Institute, Professor (20157192)
• Co-Investigator(Kenkyū-buntansha): ITO Hiroyuki Tokyo Institute of Technology, Precision and Intelligent Laboratory, Assistant Professor (40451992) ; SATO Takashi Tokyo Institute of Technology, Integrated Research Institute, Professor (20431992) ; AMAKAWA Shuhei Tokyo Institute of Technology, Integrated Research Institute, Assistant Professor (40431994) ; ISHIDA Koichi Tokyo Institute of Technology, Integrated Research Institute, Assistant Professor (30431993)
• Project Period (FY): 2004 – 2007
• Keywords: transmission line / integrated cirtcuit / nano interconnect / high speed signal propagation / low power consumption / system on chip / network on chip / wire length distribution

Research Abstract

Si CMOS has been scaled according to the "Scaling Concept" and have achieved high performance, low power consumption, and high functionality. The Si CMOS has become the most important hardware in ubiquitous network. In 2013, hundred million transistors will be integrated on a one chip of 20mm square using 35nm technology and the operating frequency is expected to be over 20GHz. The Si CMOS is progressing toward Nano Scale era.
In this work, the signal propagation is recognized to be just communication, and we have developed global wiring technology. The novel analytic expression has been derived for wire length distribution ; the wire length distribution and cumulative number of interconnects of real 130nm and 90nm CMOS chip are well expressed by our new model. We have developed global wiring technology based on differential transmission line ; 0.27pJ/bit transmission has been successfully achieved on 1cm long interconnect, and mutli drop transmission line interconnect has been also developed for future network on-chip technology. Furthermore, novel FoM (Figure of Merit) has been proposed to compare the performance of various interconnects ; the conventional RC line, the RC line using CNT (Carbon Nano Tube), transmission line interconnect which has been developed in this work, optical interconnect, and wireless interconnect. As a results, the FoM of the transmission line interconnect has most superior in the range of several hundred micron to several mm. This means the transmission line has been the best solution for global wiring.

Research Products

• [Journal Article] Application of Correlation-based Regression Analysis for Improvement of Power Distribution Network,", (2008)
  • Author(s): S. Hagiwara, T. Uezono, T. Sato, K. Masu
  • Journal Title: IEICE Transactions on Fundamentals E91-A(4)4 Pages: 951-956
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] A Bidirectional-and Multi-Drop-Transmission-Line Interconnect for Multipoint-to-Multipoint On-Chip Communications (2008)
  • Author(s): H. Ito, M. Kimura, K. Miyashita, T. Ishii, K. Okada, K. Masu
  • Journal Title: IEEE Journal of Solid-State Circuits 43(4) Pages: 1020-1029
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] オンチップ伝送線路配線の期待と課題-True Scalingを可能とする次世代配線技術- (2008)
  • Author(s): 益 一哉
  • Journal Title: 電子情報通信学会誌 91(3) Pages: 170-175
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Reconfigurable RF CMOS Circuit for Cognitive Radio(Invited Paper) (2008)
  • Author(s): K. MASU, K. OKADA
  • Journal Title: IEICE Transactions on Communications E91-B(1) Pages: 10-13
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Application of Correlation-based Regression Analysis for Improvement of Power Distribution Network (2008)
  • Author(s): Shiho, Hagiwara, Takumi, Uezono, Takashi, Sato, Kazuya, Masu
  • Journal Title: IEICE Transactions on Fundamentals Vol. E91-A, No. 4 Pages: 951-956
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] A Bidirectional- and Multi-Drop-Transmission-Line Interconnect for Multipoint-to-Multipoint On-Chip Communications (2008)
  • Author(s): Hiroyuki, Ito, Makoto, Kimura, Kazuya, Washita, Takahiro, Ishii, Kenichi, Okada, Kazuya, Masu
  • Journal Title: IEEE Journal of Solid-State Circuits Vol. 43, No. 4 Pages: 1020-1029
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] On-Chip Transmission Line Interconnect : Toward True Scaling (2008)
  • Author(s): Kazuya, Masu
  • Journal Title: Journal of IEICE Vol.91, No.3 Pages: 170-175
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Reconfigurable RF CMOS Circuit for Cognitive Radio (Invited Paper) (2008)
  • Author(s): Kazuya, MASU, Kenichi, OKADA
  • Journal Title: IEICE Transactions on Communications Vol. E91-B, No.1 Pages: 10-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] On-Chip Yagi-Uda Antenna for Horizontal Wireless Signal Transmission in Stacked Multi Chip Packaging (2007)
  • Author(s): K. Ohashi, T. Yammouch, M. Kimura, H. Ito, K. Okada, K. Itoi, M. Sato, T. Ito, R. Yamauchi, and K. Masu
  • Journal Title: Japanese Journal of Applied Physics 46(4B Pages: 2283-2286
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] 高周波シリコンCMOS送受信システムチップ (2007)
  • Author(s): 益 一哉、岡田健一
  • Journal Title: 電子情報通信学会誌 90(4) Pages: 276-282
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology (2007)
  • Author(s): H. Ito, H. Sugita, K. Okada, T. Ito, K. Itoi, M. Sato, R. Yamauchi, and K. Masu
  • Journal Title: IEICE Transactions on Electronics E90-C(3) Pages: 641-643
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] On-Chip Yagi-Uda Antenna for Horizontal Wireless Signal Transmission in Stacked Multi Chip Packaging (2007)
  • Author(s): Kazuma, Ohashi, Tackya, Yammouch, Makoto, Kimura, Hiroyuki, Ito, Kenichi, Okada, Kazuhisa, Itoi, Masakazu, Sato, Tatsuya, Ito, Ryozo, Yamauchi, Kazuya, Masu
  • Journal Title: Japanese Journal of Applied Physics Vol.46, No 4B Pages: 2283-2286
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] RF CMOS Tx/Rx Circuit (2007)
  • Author(s): Kazuya, Masu, Kenichi, Okada
  • Journal Title: Journal of IEICE Vol.90, No 4 Pages: 276-282
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology (2007)
  • Author(s): Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Tatsuya, Ito, Kazuhisa, Itoi, Masakazu, Sato, Ryozo, Yamauchi, Kazuya, Masu
  • Journal Title: IEICE Transactions on Electronics Vol. E90-C, No.3 Pages: 641-643
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Statistical Modeling of a Via Distribution for Yield Estimation (2006)
  • Author(s): T. Uezono, K. Okada, and K. Masu
  • Journal Title: IEICE Transactions on Fundamentals E89-A12 Pages: 3579-3584
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] On-Chip High-Q Variable Inductor Using Wafer-Level Chip-Scale Package Technology (2006)
  • Author(s): K. Okada, H. Sugawara, H. Ito, K. Itoi, M. Sato, H. Abe, T. Ito, and K. Masu
  • Journal Title: IEEE Transactions on Electron Devices 53(9) Pages: 2401-2406
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Improvement of Variable Ratio of On-Chip Variable Inductors Using Side Shield (2006)
  • Author(s): T. Yammouch, H. Sugawara, K. Okada and K. Masu
  • Journal Title: Japanese Journal of Applied Physics 45(7) Pages: 5720-5723
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Zero-Crosstalk Bus Line Structure for Global Interconnects in Si Ultra Large Scale Integration, (2006)
  • Author(s): M. Kimura, H. Ito, H. Sugita, K .Okada, and K. Masu
  • Journal Title: Japanese Journal of Applied Physics 45(6A) Pages: 4977-4981
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Optimization Methodology of Layer Numbers with Circuit/Process Co-design (2006)
  • Author(s): T. Kyogoku, J. Inoue, H. Nakashima, T. Uezono, K. Okada, and K. Masu
  • Journal Title: Japanese Journal of Applied Physics, 45(4A) Pages: 2476-2480
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Design of Reconfigurable RF CMOS Wireless Circuit (2006)
  • Author(s): K. Okada, Y. Yoshihara, H. Sugawara, and K. Masu
  • Journal Title: IEICE Transactions on Electronics J89-C(7) Pages: 499-507
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] RF Passive Components Using Metal Line on Si CMOS(Invited Paper). (2006)
  • Author(s): K. Masu, K. Okada, and H. Ito
  • Journal Title: IEICE Transactions on Electronics, E89-C(6) Pages: 681-691
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Statistical Modeling of a Via Distribution for Yield Estimation (2006)
  • Author(s): Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Journal Title: IEICE Transactions on Fundamentals vol.E89-A, no.12 Pages: 3579-3584
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] On-Chip High-Q Variable Inductor Using Wafer-Level Chip-Scale Package Technology (2006)
  • Author(s): Kenichi, Okada, Hirotaka, Sugawara, Hiroyuki, Ito, Kazuhisa, Itoi, Masakazu, Sato, Hiroshi, Abe, Tatsuya, Ito, Kazuya, Masu
  • Journal Title: IEEE Transactions on Electron Devices Vol. 53, No. 9 Pages: 2401-2406
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Improvement of Variable Ratio of On-Chip Variable Inductors Using Side Shield (2006)
  • Author(s): Tackya, Yammouch, Hirotaka, Sugawara, Kenichi, Okada, Kazuya, Masu
  • Journal Title: Japanese Journal of Applied Physics Vol. 45, No. 7 Pages: 5720-5723
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Zero-Crosstalk Bus Line Structure for Global Interconnects in Si Ultra Large Scale Integration (2006)
  • Author(s): Makoto, Kimura, Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Journal Title: Japanese Journal of Applied Physics Vol. 45, No. 6A Pages: 4977-4981
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Optimization Methodology of Layer Numbers with Circuit/Process Co-design (2006)
  • Author(s): Takanori, Kyogoku, Junpei, Inoue, Hidenari, Nakashima, Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Journal Title: Japanese Journal of Applied Physics Vol. 45, No. 4A Pages: 2476-2480
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Design of Reconfigurable RF CMOS Wireless Circuit (2006)
  • Author(s): Kenichi, Okada, Yoshiaki, Yoshihara, Hirotaka, Sugawara, Kazuya, Masu
  • Journal Title: IEICE Transactions on Electronics Vol. J89-C, No. 7 Pages: 499-507
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] RF Passive Components Using Metal Line on Si CMOS (2006)
  • Author(s): Kazuya, Masu, Kenichi, Okada, Hiroyuki, Ito
  • Journal Title: (Invited Paper), IEICE Transactions on Electronics vol. E89-C, no 6 Pages: 681-691
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model (2005)
  • Author(s): H. Nakashima, J. Inoue, K. Okada, and K. Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E88-A(12) Pages: 3358-3366
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Evaluation of X Architecture Using Interconnect Length Distribution (2005)
  • Author(s): H. Nakashima, N. Takagi, J. Inoue, K. Okada, and K. Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E88-A(12) Pages: 3437-3444
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] , Wire Length Distribution Model for System LSI (2005)
  • Author(s): T. Kyogoku, J. Inoue, H. Nakashima, T. Uezono, K. Okada, and K. Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E88-A(12) Pages: 3445-3452
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] "Small-Area Inductor for Silicon CMOS Chips (2005)
  • Author(s): H. Sugawara, K. Okada and K. Masu
  • Journal Title: Japanese Journal of Applied Physics 44(4B) Pages: 2766-2769
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Twisted Differential Transmission Line Structure for Global Interconnect in Si LSI (2005)
  • Author(s): H. Ito, S. Gomi, H. Sugita, K. Okada, and K. Masu
  • Journal Title: Japanese Journal of Applied Physics 44(4B) Pages: 2774-2779
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] , Wide Tuning Range LC-VCO Using Variable Inductor for Reconfigurable RF Circuit (2005)
  • Author(s): Y. Yoshihara, H. Sugawara, H. Ito, K. Okada, and K. Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E88-A(2) Pages: 507-512
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Circuit Performance Prediction Considering Core Utilization with Interconnect Length Distribution Model (2005)
  • Author(s): Hidenari, Nakashima, Junpei, Inoue, Kenichi, Okada, Kazuya, Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol. E88-A, No. 12 Pages: 3358-3366
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Evaluation of X Architecture Using Interconnect Length Distribution (2005)
  • Author(s): Hidenari, Nakashima, Naohiro, Takagi, Junpei, Inoue, Kenichi, Okada, Kazuya, Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol. E88-A, No. 12 Pages: 3437-3444
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Wire Length Distribution Model for System LSI (2005)
  • Author(s): Takanori Kyogoku, Junpei Inoue, Hidenari Nakashima, Takumi Uezono, Kenichi Okada, Kazuya Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol. E88-A, No 12 Pages: 3445-3452
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Small-Area Inductor for Silicon CMOS Chips (2005)
  • Author(s): Hirotaka Sugawara, Kemchi Okada and Kazuya Masu
  • Journal Title: Japanese Journal of Applied Physics Vol. 44, No. 4B Pages: 2766-2769
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Twisted Differential Transmission Line Structure for Global Interconnect in Si LSI (2005)
  • Author(s): Hiroyuki Ito, Shinichiro Gomi, Hideyuki Sugita, Kenichi Okada, Kazuya Masu
  • Journal Title: Japanese Journal of Applied Physics Vol 44, No. 4B Pages: 2774-2779
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] Wide Tuning Range LC-VCO Using Variable Inductor for Reconfigurable RF Circuit (2005)
  • Author(s): Yoshiaki Yoshihara, Hirotaka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol. E88-A, No. 2 Pages: 507-512
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] , Inductance-Tuned LC-VCO for Reconfigurable RF Circuit Design (2004)
  • Author(s): Y. Yoshihara, Hiroraka Sugawara, H. Ito, K. Okada, and K. Masu
  • Journal Title: IEICE EIectronics Express 1(7) Pages: 156-159
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] High Density Differential Transmission Line Structure on Si ULSI (2004)
  • Author(s): H. Ito, K. Okada and K. Masu
  • Journal Title: IEICE Transactions on Electronics E87-C(6) Pages: 942-948
  • Description: 「研究成果報告書概要(和文)」より
  • Peer Reviewed
• [Journal Article] Inductance-Tuned LC-VCO for Reconfigurable RF Circuit Design (2004)
  • Author(s): Yoshiaki Yoshihara, Hiroraka Sugawara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
  • Journal Title: IEICE Electronics Express Vol. 1, No. 7 Pages: 156-159
  • Description: 「研究成果報告書概要(欧文)」より
• [Journal Article] High Density Differential Transmission Line Structure on Si ULSI
  • Author(s): Hiroyuki Ito, Kenichi Okada, Kazuya Masu
  • Journal Title: IEICE Transactions on Electronics Vol. E87-C, No 6 Pages: 942-948
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] "RF MEMS for Reconfigurable Radio, in Sunday Evening Panel 2(SE2)MEMS for Frequency Synthesis and Wireless RF Communications(on Life without Quartz Crystal)招待講演) (2008)
  • Author(s): K. Masu
  • Organizer: The International Solid-State Circuits Conference 2008(ISSCC 2008)
  • Place of Presentation: San Francisco
  • Year and Date: 2008-02-03
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] RF MEMS for Reconfigurable Radio, in Sunday Evening Panel 2 (SE2), MEMS for Frequency Synthesis and Wireless RF Communications (or Life without Quartz Crystal) (2008)
  • Author(s): Kazuya, Masu
  • Organizer: The International Solid-State Circuits Conference 2008 (ISSCC 2008)
  • Place of Presentation: San Francisco
  • Year and Date: 2008-02-03
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] LVDS-type On-Chip Transmision Line Interconnect with Passive Equalizers in 90 nm CMOS Process (2008)
  • Author(s): A. Mineyama, H. Ito, T. Ishii, K. Okada, K. Masu
  • Organizer: IEEE/ACM Asia and South Pacific Design Automation Conference(University LSI Design Contest)
  • Place of Presentation: Seoul, Korea,
  • Year and Date: 2008-01-22
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors (2008)
  • Author(s): S. Sadoshima, S. Fukuda, T. Yammouch, H. Ito, K. Okada, K. Masu
  • Organizer: IEEE/ACM Asia and South Pacific Design Automation Conference(University LSI Design Contest)
  • Place of Presentation: Seoul, Korea,
  • Year and Date: 2008-01-22
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] LVDS-type On-Chip Transmision Line Interconnect with Passive Equalizers in 90 nm CMOS Process (2008)
  • Author(s): Akiko, Mineyama, Hiroyuki, Ito, Takahiro, Ishii, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE/ACM Asia and South Pacific Design Automation Conference (University LSI Design Contest)
  • Place of Presentation: Seoul, Korea
  • Year and Date: 2008-01-22
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors (2008)
  • Author(s): Susumu, Sadoshima, Satoshi, Fukuda, Tackya, Yammouch, Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE/ACM Asia and South Pacific Design Automation Conference (University LSI Design Contest)
  • Place of Presentation: Seoul, Korea
  • Year and Date: 2008-01-22
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Interconnect Design Issues of Nano CMOS(Invited Talk) (2008)
  • Author(s): K. Masu
  • Organizer: Mini-Colloquia on Compact Modeling of Advance MOSFET Structures and Mixed Mode Applications
  • Place of Presentation: New Delhi, India
  • Year and Date: 2008-01-05
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Interconnect Design Issues of Nano CMOS (Invited Talk) (2008)
  • Author(s): Kazuya, Masu
  • Organizer: Mini-Colloquia on Compact Modeline of Advance MOSFET Structures and Mixed Mode Applications
  • Place of Presentation: New Delhi, India.
  • Year and Date: 2008-01-05
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A MOS transistor-array for accurate measurement of subthreshold leakage variation, (2007)
  • Author(s): T. Sato, T. Uezono, S. Hagiwara, K. Okada, S. Amakawa, N. Nakayama, and K. Masu
  • Organizer: International Symposium on Quality Electronic Design(ISQED)
  • Place of Presentation: San Jose, California
  • Year and Date: 20070327-
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Low-Power Low-Phase-Noise CMOS VCO using RF SiP Technology (2007)
  • Author(s): K. Ohashi, Y. Ito, H. Ito, K. Okada, H. Hatakeyama, N. Ozawa, M. Sato, T. Aizawa, T. Ito, R. Yamauchi, and K. Masu
  • Organizer: Asia-Pacific Microwave Conference(APMC)
  • Place of Presentation: Bangkok, Thailand
  • Year and Date: 2007-12-14
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Low-Power Low-Phase-Noise CMOS VCO using RF SiP Technology (2007)
  • Author(s): Kazuma, Ohashi, Yusaku, Ito, Hiroyuki, Ito, Kenichi, Okada, Hideki, Hatakeyama, Naoyuki, Ozawa, Masakazu, Sato, Takuya, Aizawa, Tatsuya, Ito, Ryozo, Yamauchi, Kazuya, Masu
  • Organizer: Asia-Pacific Microwave Conference (APMC)
  • Place of Presentation: Bangkok, Thailand
  • Year and Date: 2007-12-14
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Chip Global Interconnect Using Transmission Line(Invited) (2007)
  • Author(s): K. Masu
  • Organizer: The 2nd WorkS.p on Interconnect Design and Variablity(IDV2007)
  • Place of Presentation: Bangalore, India
  • Year and Date: 2007-12-13
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Chip Global Interconnect Using Transmission Line(Invited) (2007)
  • Author(s): Kazuya, Masu
  • Organizer: Paper 2 of the Day 1, The 2nd Workshop on Interconnect Design and Variablity (IDV2007)
  • Place of Presentation: Bangalore, India
  • Year and Date: 2007-12-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A 5.2GHz CMOS Low Noise Amplifier with High-Q Inductors Embedded in Wafer-Level Chip-Scale Package (2007)
  • Author(s): S. Fukuda, H. Ito, K. Itoi, M. Sato, T. Ito, R. Yamauchi, K. Okada, and K. Masu
  • Organizer: International Workshop on RF Integration Technology(RFIT)
  • Place of Presentation: Singapore
  • Year and Date: 2007-12-10
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A 5.2GHz CMOS Low Noise Amphfier with High-Q Inductors Embedded in Wafer-Level Chip-Scale Package (2007)
  • Author(s): Satoshi, Fukuda, Hiroyuki, Ito, Kazuhisa, Itoi, Masakazu, Sato, Tatsuya, Ito, Ryozo, Yamauchi, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Workshop on RF Integration Technology (RFIT)
  • Place of Presentation: Singapore
  • Year and Date: 2007-12-10
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type voltage controlled oscillator (2007)
  • Author(s): H. Hatakeyama, K. Okada, K. Ohashi, Y. Ito, N. Ozawa, M. Sato, T. Aizawa, T. Ito, R. Yamauchi, and K. Masu
  • Organizer: Advanced Metallization Conference, Asian Session(ADMETA)
  • Place of Presentation: Tokyo, Japan
  • Year and Date: 2007-10-24
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High Frequency Characteristics of On-Chip Wirings up to 110 GHz (2007)
  • Author(s): K. Miyashita, H. Ito, K. Okada, and K. Masu
  • Organizer: Advanced Metallization Conference, Asian Session(ADMETA)
  • Place of Presentation: Tokyo, Japan
  • Year and Date: 2007-10-24
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type voltage controlled oscillator (2007)
  • Author(s): Hideki, Hatakeyama, Kenichi, Okada, Kazuma, Ohashi, Yusaku, Ito, Naoyuki, Ozawa, Masakazu, Sato, Takuya, Aizawa, Tatsuya, Ito, Ryozo, Yamauchi, Kazuya, Masu
  • Organizer: Advanced Metallization Conference, Asian Session (ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2007-10-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High Frequency Characteristics of On-Chip Wirings up to 110 GHz (2007)
  • Author(s): Kazuya, Miyashita, Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: Advanced Metallization Conference, Asian Session (ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2007-10-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Signal transmission through interconnects with repetitive loads (2007)
  • Author(s): S. Amakawa, H. Ito, and K. Masu
  • Organizer: Advanced Metallization Conference, Asian Session(ADMETA)
  • Place of Presentation: Tokyo, Japan
  • Year and Date: 2007-10-23
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Signal transmission through interconnects with repetitive loads (2007)
  • Author(s): Shuhei, Amakawa, Hiroyuki, Ito, Kazuya, Masu
  • Organizer: Advanced Metallization Conference, Asian Session (ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2007-10-23
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type voltage controlled oscillator (2007)
  • Author(s): H. Hatakeyama, K. Okada, K. Ohashi, Y. Ito, N. Ozawa, M. Sato, T. Aizawa, T. Ito, R. Yamauchi, and K. Masu
  • Organizer: Advanced Metallization Conference(AMC)
  • Place of Presentation: Albany, New York, USA
  • Year and Date: 2007-10-09
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High Frequency Characteristics of On-Chip Wirings up to 110 GHz (2007)
  • Author(s): K. Miyashita, H. Ito, K. Okada, and K. Masu
  • Organizer: Advanced Metallization Conference(AMC)
  • Place of Presentation: Albany, New York, USA
  • Year and Date: 2007-10-09
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Signal transmission through interconnects with repetitive loads (2007)
  • Author(s): S. Amakawa, H. Ito, and K. Masu
  • Organizer: Advanced Metallization Conference(AMC)
  • Place of Presentation: Albany, New York, USA
  • Year and Date: 2007-10-09
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Wafer-level-packaging inductor with extremely high quality factor and its application to 5.8GHz LC-type voltage controlled oscillator (2007)
  • Author(s): Hideki, Hatakeyama, Kenichi, Okada, Kazuma, Ohashi, Yusaku, Ito, Naoyuki, Ozawa, Masakazu, Sato, Takuya, Aizawa, Tatsuya, Ito, Ryozo, Yamauchi, Kazuya, Masu
  • Organizer: Advanced Metallization Conference (AMC)
  • Place of Presentation: Albany, New York
  • Year and Date: 2007-10-09
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High Frequency Characteristics of On-Chip Wirings up to 110 GHz (2007)
  • Author(s): Kazuya, Miyashita, Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: Advanced Metallization Conference (AMC)
  • Place of Presentation: Albany, New York
  • Year and Date: 2007-10-09
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Signal transmission through interconnects with repetitive loads (2007)
  • Author(s): Shuhei, Amakawa, Hiroyuki, Ito, Kazuya, Masu
  • Organizer: Advanced Metallization Conference (AMC)
  • Place of Presentation: Albany, New York
  • Year and Date: 2007-10-09
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180nm CMOS Technology,. (2007)
  • Author(s): Y. Kobayashi, K. Ohashi, Y. Ito, H. Ito, K. Okada, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Tukuba, Japan
  • Year and Date: 2007-09-08
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180 nm CMOS Technology (2007)
  • Author(s): Yuka, Kobayashi, Kazuma, Ohashi, Yusaku, Ito, Hiroyuki, Ito, Kemchi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: Tukuba
  • Year and Date: 2007-09-08
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Weakness identification for effective repair of power distribution network, Sweden (2007)
  • Author(s): T. Sato, S. Hagiwara, T. Uezono, and K. Masu
  • Organizer: 17th International workshop on power and timing modeling, optimization and simulation(PATMOS)
  • Place of Presentation: Goteborg, Sweden
  • Year and Date: 2007-09-04
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Weakness identification for effective repair of power distribution network (2007)
  • Author(s): Takashi, Sato, Shiho, Hagiwara, Takumi, Uezono, Kazuya, Masu
  • Organizer: 17th International workshop on power and timing modeling, optimization and simulation (PATMOS)
  • Place of Presentation: Goteborg, Sweden
  • Year and Date: 2007-09-04
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A 8-Gbps Low-Latency Multi-Drop On-Chip Transmission Line Interconnect With 1.2-mW Two-Way Transceivers (2007)
  • Author(s): H. Ito, M. Kimura, K. Okada, and K. Masu
  • Organizer: IEEE Symposium on VLSI Circuits
  • Place of Presentation: Kyoto, Japan
  • Year and Date: 2007-06-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A 8-Gbps Low-Latency Multi-Drop On-Chip Transmission Line Interconnect with 1.2-mW Two-Way Transceivers (2007)
  • Author(s): Hiroyuki, Ito, Makoto, Kimura, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Symposium on VLSI Circuits
  • Place of Presentation: Kyoto
  • Year and Date: 2007-06-15
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Low-Latency and High-Power-Efficient On-Chip LVDS Transmission Line Interconnect for a RC Interconnect Alternative (2007)
  • Author(s): H. Ito, J. Seita, T. Ishii, H. Sugita, K. Okada, and K. Masu
  • Organizer: IEEE International Interconnect Technology Conference(IITC)
  • Place of Presentation: San Francisco, USA
  • Year and Date: 2007-06-06
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Low-Latency and High-Power-Efficient On-Chip LVDS Transmission Line Interconnect for a RC Interconnect Alternative (2007)
  • Author(s): Hiroyuki, Ito, Junki, Salta, Takahiro, Ishii, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE International Interconnect Technology Conference (IITC)
  • Place of Presentation: San Francisco
  • Year and Date: 2007-06-06
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Design of High-Density Interconnects for High-Speed Transmission (2007)
  • Author(s): W. Fu, M. Kimura, K. Okada, J. Sakai, and K. Masu
  • Organizer: The 57th Electronic Components and Technology Conference(ECTC)
  • Place of Presentation: Reno, Nevada, USA,
  • Year and Date: 2007-05-30
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Design of High-Density Interconnects for High-Speed Transmission (2007)
  • Author(s): Wanlin, Fu, Makoto, Kimura, Kenichi, Okada, Jun, Sakai, Kazuya, Masu
  • Organizer: The 57th Electronic Components and Technology Conference (ECTC)
  • Place of Presentation: Reno, Nevada, USA
  • Year and Date: 2007-05-30
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A MOS transistor-array for accurate measurement of subthreshold leakage variation (2007)
  • Author(s): Takashi, Sato, Takumi, Uezono, Shiho, Hagiwara, Kemchi, Okada, Shuhei, Amakawa, Noriaki, Nakayama, Kazuya, Masu
  • Organizer: International Symposium on Quality Electronic Design (ISQED)
  • Place of Presentation: San Jose, California
  • Year and Date: 2007-03-27
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] "Adaptable wire-length distribution with tunable occupation probability (2007)
  • Author(s): S. Amakawa, T. Uezono, T. Sato, K. Okada, and K. Masu
  • Organizer: International Workshop on System Level Interconnect Prediction(SLIP)
  • Place of Presentation: Austin, Texas
  • Year and Date: 2007-03-17
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Adaptable wire-length distribution with tunable occupation probability (2007)
  • Author(s): Shuhei, Amakawa, Takumi, Uezono, Takashi, Sato, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Workshop on System Level Interconnect Prediction (SLIP)
  • Place of Presentation: Austin, Texas
  • Year and Date: 2007-03-17
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Improvement of power distribution network using correlation-based regression analysis (2007)
  • Author(s): S. Hagiwara, T. Uezono, T. Sato, and K. Masu
  • Organizer: Great Lakes Symposium on VLSI(GLSVLSI)
  • Place of Presentation: Stresa-Lago Maggiore, Italy
  • Year and Date: 2007-03-13
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Improvement of power distribution network using correlation-based regression analysis (2007)
  • Author(s): Shiho, Hagiwara, Takumi, Uezono, Takashi, Sato, Kazuya, Masu
  • Organizer: Great Lakes Symposium on VLSI (GLSVLSI)
  • Place of Presentation: Stresa-Lago Maggiore, Italy
  • Year and Date: 2007-03-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Multi-Drop Transmission-Line Interconnect in Si LSI (2007)
  • Author(s): J. Seita, H. Ito, K. Okada, T. Sato, and K. Masu
  • Organizer: Asia and South Pacific Design Automation Conference(ASP-DAC)
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2007-01-24
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation (2007)
  • Author(s): S. Fukuda, D. Kawazoe, K. Okada, and K. Masu
  • Organizer: Asia and South Pacific Design Automation Conference(ASP-DAC)
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2007-01-24
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Wideband CMOS LC-VCO Using Variable Inductor (2007)
  • Author(s): K. Ohashi, Y. Ito, Y. Yoshihara, K. Okada, and K. Masu
  • Organizer: Asia and South Pacific Design Automation Conference(ASP-DAC)
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2007-01-24
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Multi-Drop Transmission-Line Interconnect in Si LSI (2007)
  • Author(s): Junki, Seita, Hiroyuki, Ito, Kenichi, Okada, Takashi, Sato, Kazuya, Masu
  • Organizer: Asia and South Pacific Design Automation Conference
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2007-01-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation (2007)
  • Author(s): Satoshi, Fukuda, Daisuke, Kawazoe, Kenichi, Okada, Kazuya, Masu
  • Organizer: Asia and South Pacific Design Automation Conference
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2007-01-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Wideband CMOS LC-VCO Using Variable Inductor (2007)
  • Author(s): Kazuma, Ohashi, Yusaku, Ito, Yoshiaki, Yoshihara, Kenichi, Okada, Kazuya, Masu
  • Organizer: Asia and South Pacific Design Automation Conference
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2007-01-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors (2007)
  • Author(s): T. Yammouch, K. Okada, and K. Masu
  • Organizer: 2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems(SiRF)
  • Place of Presentation: Long Beach, California,
  • Year and Date: 2007-01-10
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Small-Area CMOS RF Distributed Mixer Using Multi-Port Inductors (2007)
  • Author(s): Tackya, Yammouch, Kenichi, Okada, Kazuya, Masu
  • Organizer: 2007 Topical Meeting on Silicon Monohthic Integrated Circuits in RF Systems (SiRF)
  • Place of Presentation: Long Beach, California
  • Year and Date: 2007-01-10
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Transmission Line Interconnect on Si CMOS LSI,(Invited Paper) (2006)
  • Author(s): K. Masu, K. Okada, and H. Ito
  • Organizer: 8th International Conference on Solid-State and Integrated-Circuit Technology
  • Place of Presentation: Shanghai, China
  • Year and Date: 20061023-26
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Equivalent Circuit Model for On-Chip Variable Inductor (2006)
  • Author(s): T. Yammouch, K. Ishida, K. Okada, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Yokohama
  • Year and Date: 20060913-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Chip Yagi Antenna for Wireless Signal Transmission in Stacked MCP, (2006)
  • Author(s): K. Ohashi, T. Yammouch, M. Kimura, H. Ito, K. Okada, K. Ishida, K. Itoi, M. Sato, T. Ito, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Yokohama
  • Year and Date: 20060913-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology (2006)
  • Author(s): K. Okada, T. Uezono, and K. Masu
  • Organizer: International Workshop on Power and Timing Modeling, Optimization and Simulation(PATMOS)
  • Place of Presentation: Montpellier, France,
  • Year and Date: 20060913-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High-Crosstalk Robustness Transmission Line Interconnect in Si LSI using Zero-Crosstalk Structure (2006)
  • Author(s): M. Kimura, H. Ito, H. Sugita, K. Okada, and K. Masu
  • Organizer: IEEE Workshop on Signal Propagation on Interconnects(SPI)
  • Place of Presentation: Berlin-Mitte, Germany,
  • Year and Date: 20060510-12
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Loss Optimization Method Using WD Product for On-Chip Differential Transmission Line Design (2006)
  • Author(s): H. Ito, K. Okada, and K. Masu
  • Organizer: IEEE Workshop on Signal Propagation on Interconnects(SPI)
  • Place of Presentation: Berlin-Mitte, Germany,
  • Year and Date: 20060510-12
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-chip/Off-chip High Density Transmission Line Interconnect,(Invited Paper), (2006)
  • Author(s): K. Masu, K. Okada, and H. Ito
  • Organizer: International Conference on Electronics Packaging(ICEP2006)
  • Place of Presentation: Tokyo
  • Year and Date: 20060419-21
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Yield Estimation Considering Via Defects (2006)
  • Author(s): T. Uezono, K. Okada, and K.Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies,
  • Place of Presentation: Nagoya
  • Year and Date: 20060403-04
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Via Distribution Model for Yield Estimation (2006)
  • Author(s): T. Uezono, K. Okada, and K. Masu
  • Organizer: IEEE International Symposium on Quality Electronic Design(ISQED)
  • Place of Presentation: San Jose,California
  • Year and Date: 20060328-19
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-chip signal transmission and interconnect for Si CMOS LSI,(Invited Paper) (2006)
  • Author(s): K. Masu, K. Okada, and H. Ito
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: San Diego,California
  • Year and Date: 20060118-20
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology for One-Chip Wireless Communication Circuits (2006)
  • Author(s): J. Seita, H. Ito, H. Sugita, K. Okada, T. Ito, K. Itoi, M. Sato, and K. Masu
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: San Diego, CA
  • Year and Date: 20060118-20
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] An Left Handed Material on Si CMOS Chip with Wafer Level Package Process (2006)
  • Author(s): J.-G. Kim, K. Okada, T. Yammouch, T. Sato, and K. Masu
  • Organizer: IEEE Asia-Pacific Microwave Conference(APMC).
  • Place of Presentation: Yokohama, Japan
  • Year and Date: 2006-12-14
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] An Left Handed Material on Si CMOS Chip with Wafer Level Package Process (2006)
  • Author(s): Jang-Gu, Kim, Kenichi, Okada, Tackya, Yammouch, Takashi, Sato, Kazuya, Masu
  • Organizer: IEEE Asia-Pacific Microwave Conference (APMC)
  • Place of Presentation: Yokohama
  • Year and Date: 2006-12-14
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] ADC-7GHz Small-Area Distributed Amplifier Using5-port Inductors in a 180nm Si CMOS Technology (2006)
  • Author(s): T. Ito, D. Kawazoe, K. Okada, and K. Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference(A-SSCC),
  • Place of Presentation: Hangzhou, China
  • Year and Date: 2006-11-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A 0.98 to 6.6GHz Tunable Wideband VCO in a 180nm CMOS Technology for Reconfigurable Radio Transceiver (2006)
  • Author(s): Y. Ito, H. Sugawara, K. Okada, and K. Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference(A-SSCC)
  • Place of Presentation: Hangzhou, China
  • Year and Date: 2006-11-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A DC-7GHz Small-Area Distributed Amplifier Using 5-port Inductors in a 180nm Si CMOS Technology (2006)
  • Author(s): Takeshi, Ito, Daisuke, Kawazoe, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference (A-SSCC)
  • Place of Presentation: Hangzhou, China
  • Year and Date: 2006-11-15
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A 0.98 to 6.6GHz Tunable Wideband VCO in a 180nm CMOS Technology for Reconfigurable Radio Transceiver (2006)
  • Author(s): Yusaku, Ito, Hirotaka, Sugawara, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference (A-SSCC)
  • Place of Presentation: Hangzhou, China
  • Year and Date: 2006-11-15
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A 6.5-mW5-Gbps On-Chip Differential Transmission Line Interconnect with a Low-Latency Asymmetric Tx in a 180nm CMOS Technology (2006)
  • Author(s): T. Ishii, H. Ito, M. Kimura, K. Okada, and K. Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference(A-SSCC)
  • Place of Presentation: Hangzhou, China
  • Year and Date: 2006-11-14
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A 6.5-mW 5-Gbps On-Chip Differential Transmission Line Interconnect with a Low-Latency Asymmetric Tx in a 180nm CMOS Technology (2006)
  • Author(s): Takahiro, shuii, Hiroyuki, Ito, Makoto, Kimura, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference (A-SSCC)
  • Place of Presentation: Hangzhou, China
  • Year and Date: 2006-11-14
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Transmission Line Interconnect on Si CMOS LSI (2006)
  • Author(s): Kazuya, Masu, Kenichi, Okada, Hiroyuki, Ito
  • Organizer: (Invited Paper), 8th International Conference on Solid-State and Integrated-Circuit Technology
  • Place of Presentation: Shanghai, China.
  • Year and Date: 2006-10-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Chip Differential-Transmission-Line(DTL)Interconnect for 22nm Technology (2006)
  • Author(s): K. Okada, H. Ito, and K. Masu
  • Organizer: Advanced Metallization Conference(AMC)
  • Place of Presentation: San Diego, CA
  • Year and Date: 2006-10-17
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology (2006)
  • Author(s): Kenichi, Okada, Hiroyuki, Ito, Kazuya, Masu
  • Organizer: Advanced Metallization Conference (AMC)
  • Place of Presentation: San Diego, CA
  • Year and Date: 2006-10-17
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Chip Differential-Transmission-Line(DTL)Interconnect for 22nm Technology (2006)
  • Author(s): K. Okada, H. Ito, and K. Masu
  • Organizer: Advanced Metallization Conference, Asian Session(ADMETA),
  • Place of Presentation: Tokyo,
  • Year and Date: 2006-09-27
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Chip Differential-Transmission-Line(DTL) Interconnect for 22nm Technology (2006)
  • Author(s): Kenichi, Okada, Hiroyuki, Ito, Kazuya, Masu
  • Organizer: Advanced Metallization Conference, Asian Session (ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2006-09-27
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology (2006)
  • Author(s): Kenichi, Okada, Takumi, Uezono, Kazuya, Masu
  • Organizer: International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)
  • Place of Presentation: Montpellier, France
  • Year and Date: 2006-09-14
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Equivalent Circuit Model for On-Chip Variable Inductor (2006)
  • Author(s): Tackya, Yammouch, Koichi, Ishida, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: Yokohama
  • Year and Date: 2006-09-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Chip Yagi Antenna for Wireless Signal Transmission in Stacked MCP (2006)
  • Author(s): Kazuma, Ohashi, Tackya, Yammouch, Makoto, Kimura, Hiroyuki, Ito, Kenichi, Okada, Koichi, Ishida, Kazuhisa, Itoi, Masakazu, Sato, Tatsuya, Ito, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: Yokohama
  • Year and Date: 2006-09-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Reconfigurable CMOS Low Noise Amplifier for Self Compensation (2006)
  • Author(s): D. Kawazoe, H. Sugawara, T. Ito, K. Okada, and K. Masu
  • Organizer: , IEEE International Symposium on Circuits and Systems(ISCAS)
  • Place of Presentation: Kos, Greece,
  • Year and Date: 2006-05-23
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Reconfigurable CMOS Low Noise Amplifier for Self Compensation (2006)
  • Author(s): Daisuke, Kawazoe, Hirotaka, Sugawara, Takeshi, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE International Symposium on Circuits and Systems (ISCAS)
  • Place of Presentation: Kos/Greece
  • Year and Date: 2006-05-23
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High-Crosstalk Robustness Transmission Line Interconnect in Si LSI using Zero-Crosstalk Structure (2006)
  • Author(s): Makoto, Kimura, Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Workshop on Signal Propagation on Interconnects (SPI)
  • Place of Presentation: Berhn-Mitte, Germany
  • Year and Date: 2006-05-12
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Loss Optimization Method Using WD Product for On-Chip Differential Transmission Line Design (2006)
  • Author(s): Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Workshop on Signal Propagation on Interconnects (SPI)
  • Place of Presentation: Berlin-Mitte, Germany
  • Year and Date: 2006-05-10
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-chip/Off-chip High Density Transmission Line Interconnect (2006)
  • Author(s): Kazuya, Masu, Kenichi, Okada, Hiroyuki, Ito
  • Organizer: (Invited Paper), International Conference on Electronics Packaging (ICEP2006), Tokyo, Japan
  • Place of Presentation: Tokyo
  • Year and Date: 2006-04-20
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Power Reduction Using On-Chip Transmission Line for 45nm technology (2006)
  • Author(s): K. Okada, T. Uezono, and K. Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies
  • Place of Presentation: Nagoya
  • Year and Date: 2006-04-03
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Yield Estimation Considering Via Defects (2006)
  • Author(s): Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies
  • Place of Presentation: Nagoya
  • Year and Date: 2006-04-03
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Via Distribution Model for Yield Estimation (2006)
  • Author(s): Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE International Symposium on Quality Electronic Design
  • Place of Presentation: San Jose, California
  • Year and Date: 2006-03-28
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-chip signal transmission and interconnect for Si CMOS LSI (2006)
  • Author(s): Kazuya, Masu, Kenichi, Okada, Hiroyuki, Ito
  • Organizer: (Invited Paper), IEEE Topical Meeting on Silicon. Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: San Diego, California
  • Year and Date: 2006-01-19
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology for One-Chip Wireless Communication Circuits (2006)
  • Author(s): Junki, Seita, Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Tatsuya, Ito, Kazuhisa, Itoi, Masakazu, Sato, Kazuya, Masu
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: San Diego
  • Year and Date: 2006-01-18
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Reconfigurable RF Circuit Design for Multi-Function and Self-Compensation (2005)
  • Author(s): K. Okada, H. Sugawara D. Kawazoe, Y. Ito, and K. Masu
  • Organizer: International Symposium on Advanced Reconfigurable Systems, .
  • Place of Presentation: Kyoto
  • Year and Date: 20051215-16
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Gbps Signal Transmission on Si CMOS ULSI,(keynote lecture) (2005)
  • Author(s): K. Masu
  • Organizer: International Conference on Electronics Materials and Packaging(EMAP2005)
  • Place of Presentation: Tokyo, Japan
  • Year and Date: 20051210-14
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Reconfigurable RF Circuit Architecture for Dynamic Power Reduction (2005)
  • Author(s): D. Kawazoe, H. Sugawara, T. Ito, K. Okada, and K. Masu
  • Organizer: IEEE International Region 10 Conference.
  • Place of Presentation: Melbourne, Australia
  • Year and Date: 20051121-24
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] 4 Gbps On-Chip Interconnection using Differential Transmission Line (2005)
  • Author(s): H. Ito, H. Sugita, K. Okada, and K. Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference(A-SSCC)
  • Place of Presentation: Hsinchu, Taiwan,
  • Year and Date: 20051101-03
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A 1.3-2.8 GHz Wide Range CMOSLC-VCO Using Variable Inductor (2005)
  • Author(s): Y. Ito, Y. Yoshihara, H. Sugawara, K. Okada, and K. Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference(A-SSCC)
  • Place of Presentation: Hsinchu, Taiwan
  • Year and Date: 20051101-03
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Reconfigurable CMOS LNA for Software Defined Radio Using Variable Inductor (2005)
  • Author(s): H. Sugawara, Y. Yoshihara, K. Okada, and K. Masu
  • Organizer: IEEE MTT-S European Microwave Conference
  • Place of Presentation: Paris, France
  • Year and Date: 20051004-06
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Chip Variable Inductor using MOSFET Switches (2005)
  • Author(s): K. D. Pham, K. Okada, and K. Masu
  • Organizer: IEEE MTT-S European Microwave Conference
  • Place of Presentation: Paris, France
  • Year and Date: 20051004-06
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Large Variable Ration On-Chip Inductor with Spider Legs Shield (2005)
  • Author(s): T. Yammouch, H. Sugawara, K. Okada, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Kobe, Japan
  • Year and Date: 20050913-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Reconfigurable RF Circuit Design for Multi-Function and Self-Compensation (2005)
  • Author(s): Kenichi, Okada, Hirotaka, Sugawara, Daisuke, Kawazoe, Yusaku, Ito, Kazuya, Masu
  • Organizer: International Symposium on Advanced Reconfigurable Systems
  • Place of Presentation: Kyoto
  • Year and Date: 2005-12-15
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Gbps Signal Transmission on Si CMOS ULSI (keynote lecture) (2005)
  • Author(s): Kazuya, Masu
  • Organizer: International Conference on Electronics Materials and Packaging (EMAP2005)
  • Place of Presentation: Tokyo, Japan
  • Year and Date: 2005-12-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Reconfigurable RF Circuit Architecture for Dynamic Power Reduction (2005)
  • Author(s): Daisuke, Kawazoe, Hirotaka, Sugawara, Takeshi, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE International Region 10 Conference, Melbourne
  • Place of Presentation: Australia
  • Year and Date: 2005-11-24
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A 1. 3-2. 8 GHz Wide Range CMOS LC-VCO Using Variable Inductor (2005)
  • Author(s): Yusaku, Ito, Yoshiaki, Yoshihara, Hirotaka, Sugawara, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference
  • Place of Presentation: Hsinchu, Taiwan
  • Year and Date: 2005-11-02
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] 4 Gbps On-Chip Interconnection using Differential Transmission Line (2005)
  • Author(s): Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asian Solid-State Circuits Conference
  • Place of Presentation: Hsinchu, Taiwan
  • Year and Date: 2005-11-01
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High-Density Differential Transmission Line Bus Structure for 65nm Technology (2005)
  • Author(s): M. Kimura, H. Ito, H. Sugita, K. Okada, and K. Masu
  • Organizer: Advanced Metallization Conference Asian Session(ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2005-10-13
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High-Density Differential Transmission Line Bus Structure for 65nm Technology (2005)
  • Author(s): Makoto, Kimura, Hiroyuki, Ito, Hideyuki, Sugita, kenichi, Okada, Kazuya, Masu
  • Organizer: Advanced Metallization Conference Asian Session (ADMFTA)
  • Place of Presentation: Tokyo
  • Year and Date: 2005-10-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Chip Variable Inductor using MOSFET Switches (2005)
  • Author(s): Khoa Dang, Pham, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE MTT-S European Microwave Conference
  • Place of Presentation: Paris
  • Year and Date: 2005-10-06
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Reconfigurable CMOS LNA for Software Defined Radio Using Variable Inductor (2005)
  • Author(s): Hirotaka, Sugawara, Yoshiaki, Yoshihara, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE MTT-S European Microwave Conference
  • Place of Presentation: Paris
  • Year and Date: 2005-10-04
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High-Density Differential Transmission Line Bus Structure for 65nm Technology (2005)
  • Author(s): M. Kimura, H. Ito, H. Sugita, K. Okada, and K. Masu
  • Organizer: Advanced Metallization Conference 2005(AMC)
  • Place of Presentation: Colorado Springs, Colorado
  • Year and Date: 2005-09-27
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High-Density Differential Transmission Line Bus Structure for 65nm Technology (2005)
  • Author(s): Makoto, Kimura, Hiroyuki, Ito, Hideyuki, Sugita, kenichi, Okada, Kazuya, Masu
  • Organizer: Advanced Metallization Conference 2005 (AMC)
  • Place of Presentation: Colorado Springs, Colorado
  • Year and Date: 2005-09-27
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI (2005)
  • Author(s): M. Kimura, H. Ito, H. Sugita, K. Okada, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Kobe, Japan
  • Year and Date: 2005-09-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI (2005)
  • Author(s): Makoto, Kimura, Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials
  • Place of Presentation: Kobe
  • Year and Date: 2005-09-15
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Large Variable Ration On-Chip Inductor with Spider Legs Shield (2005)
  • Author(s): Tackya, Yammouch, Hirotaka, Sugawara, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Solid State Devices and Materials
  • Place of Presentation: Kobe
  • Year and Date: 2005-09-14
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Development of Differential Transmission Line Interconnect IP for High-Speed Global Interconnect (2005)
  • Author(s): H. Ito, K. Okada, and K. Masu
  • Organizer: Circuit Exhibition of European Solid-State Device Research Conference and European Solid-State Circuits Conference
  • Place of Presentation: ,Grenoble, France
  • Year and Date: 2005-09-12
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Development of Differential Transmission Line Interconnect IP for High-Speed Global Interconnect (2005)
  • Author(s): H. Ito, K. Okada, K. Masu
  • Organizer: Circuit Exhibition of European Solid-State Device Research Conference and European Solid-State Circuits Conference Poster 26
  • Place of Presentation: Grenoble
  • Year and Date: 2005-09-12
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Wire Length Distribution Model Considering Core Utilization for System on Chip (2005)
  • Author(s): T. Kyogoku, J. Inoue, H. Nakashima, T. Uezono, K. Okada and K. Masu
  • Organizer: IEEE Computer Society Annual Symposium on VLSI
  • Place of Presentation: Tampa, Florida,
  • Year and Date: 2005-05-11
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Wire Length Distribution Model Considering Core Utilization for System on Chip (2005)
  • Author(s): Takanori, Kyogoku, Junpei, Inoue, Hidenari, Nakashima, Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Computer Society Annual Symposium on VLSI
  • Place of Presentation: Tampa, Florida
  • Year and Date: 2005-05-11
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Wafer Measurement of Pseudo Differential Transmission Line for Global Interconnect in Si LSI, (2005)
  • Author(s): H. Sugita, H. Ito, S. Gomi, K. Okada, and K. Masu
  • Organizer: International Meeting for Future of Electron Devices
  • Place of Presentation: Kyoto
  • Year and Date: 2005-04-12
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Wafer Measurement of Pseudo Differential Transmission Line for Global Interconnect in Si LSI (2005)
  • Author(s): Hideyuki, Sugita, Hiroyuki, Ito, Shinichiro, Gomi, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Meeting for Future of Electron Devices
  • Place of Presentation: Kyoto
  • Year and Date: 2005-04-12
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Prediction of Delay Time for Future LSI Using On-Chip Transmission Line Interconnects (2005)
  • Author(s): T. Uezono, J. Inoue, T. Kyogoku, K. Okada, and K. Masu
  • Organizer: IEEE International Workshop on System Level Interconnect Prediction
  • Place of Presentation: San Francisco, CA
  • Year and Date: 2005-04-02
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Prediction of Delay Time for Future LSI Using On-Chip Transmission Line Interconnects (2005)
  • Author(s): Takumi, Uezono, Junpei, Inoue, Takanori, Kyogoku, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE International Workshop on System Level Interconnect Prediction
  • Place of Presentation: San Francisco
  • Year and Date: 2005-04-02
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Topics relating to CMOS Circuits: Transmission Line and CMOS Reconfigurable Circuit Technology Inteterconnect (2005)
  • Author(s): K. Masu
  • Organizer: 6th Workshop and IEEE EDS Mini-colloquia on Nanometer CMOS Technology(WIMNACT)
  • Place of Presentation: Hsinchu, Taiwan
  • Year and Date: 2005-01-21
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Dynamic Reconfigurable RF Circuit Architecture (2005)
  • Author(s): K. Okada, Y. Yoshihara, H. Sugawara, and K. Masu
  • Organizer: IEEE/ACM Asia South Pacific Design Automation Conference(ASP-DAC)
  • Place of Presentation: Shanghai, China
  • Year and Date: 2005-01-21
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Topics relating to CMOS Circuits : Transmission Line and CMOS Reconfigurable Circuit Technology Inteterconnect (2005)
  • Author(s): Kazuya, Masu
  • Organizer: 6th Workshop and IEEE EDS Mini-colloquia on Nanometer CMOS Technology (WIMNACT)
  • Place of Presentation: Hsinchu, Taiwan
  • Year and Date: 2005-01-21
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Dynamic Reconfigurable RF Circuit Architecture (2005)
  • Author(s): Kenichi, Okada, Yoshiaki, Yoshihara, Hirotaka, Sugawara, Kazuya, Masu
  • Organizer: IEEE/ACM Asia South Pacific Design Automation Conference
  • Place of Presentation: Shanghai, China
  • Year and Date: 2005-01-21
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Evaluation of On-Chip Transmission Line Interconnect Using Wire Length Distribution (2005)
  • Author(s): J. Inoue, H. Ito, S. Gomi, T. Kyogoku, T. Uezono, K. Okada, and K. Masu
  • Organizer: IEEE/ACM Asia South Pacific Design Automation Conference(ASP-DAC)
  • Place of Presentation: Shanghai, China
  • Year and Date: 2005-01-19
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Evaluation of On-Chip Transmission Line Interconnect Using Wire Length Distribution (2005)
  • Author(s): Junpei, Inoue, Hiroyuki, Ito, Shinichiro, Gomi, Takanori, Kyogoku, Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE/ACM Asia South Pacific Design Automation Conference
  • Place of Presentation: Shanghai, China
  • Year and Date: 2005-01-19
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High Density Bus Line Structure With Pseudo Differential Transmission Line in Si ULSI (2004)
  • Author(s): H. Ito, S. Gomi, H. Sugita, K. Okada, and K. Masu
  • Organizer: IEEE Asia-Pacific Microwave Conference(APMC)
  • Place of Presentation: Delhi, lndia
  • Year and Date: 2004-12-17
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Small Area Inductor for Silicon CMOS Chip (2004)
  • Author(s): H. Sugawara, K. Okada and K. Masu
  • Organizer: IEEE Asia-Pacific Microwave Conference(APMC)
  • Place of Presentation: Delhi, lndia
  • Year and Date: 2004-12-17
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High Density Bus Line Structure With Pseudo Differential Transmission Line in Si ULSI (2004)
  • Author(s): Hiroyuki, Ito, Shinichiro, Gomi, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asia-Pacific Microwave Conference
  • Place of Presentation: Delhi, India
  • Year and Date: 2004-12-17
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Small Area Inductor for Silicon CMOS Chip (2004)
  • Author(s): Hirotaka, Sugawara, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Asia-Pacific Microwave Conference
  • Place of Presentation: Delhi, India
  • Year and Date: 2004-12-17
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] On-Chip Transmission Line for Long Global Interconnects (2004)
  • Author(s): H. Ito, J. Inoue, S. Gomi, H. Sugita, K. Okada, and K. Masu
  • Organizer: IEEE International Electron Devices Meeting(IEDM)
  • Place of Presentation: San Francisco
  • Year and Date: 2004-12-15
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] On-Chip Transmission Line for Long Global Interconnects (2004)
  • Author(s): Hiroyuki, Ito, Junpei, Inoue, Shinichiro, Gomi, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE International Electron Devices Meeting (IEDM)
  • Place of Presentation: San Francisco
  • Year and Date: 2004-12-15
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Optimization Methodology of Global Interconnect Structure, (2004)
  • Author(s): J. Inoue, H. Nakashima, T. Kyogoku, T. Uezono, K. Okada, and K. Masu
  • Organizer: International Conference on Microelectronics
  • Place of Presentation: Tunis
  • Year and Date: 2004-12-07
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Optimization Methodology of Global Interconnect Structure (2004)
  • Author(s): Junpei, Inoue, Hidenari, Nakashima, Takanori, Kyogoku, Takumi, Uezono, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Microelectronics
  • Place of Presentation: Tunis
  • Year and Date: 2004-12-07
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High Speed and Low Power On-Chip Micro Network Circuit with Differential Transmission Line (2004)
  • Author(s): S. Gomi, K. Nakamura, H. Ito, H. Sugita, K. Okada, and K. Masu
  • Organizer: International Symposium on System-on-Chip,
  • Place of Presentation: Tampere, Finland
  • Year and Date: 2004-11-18
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High Speed and Low Power On-Chip Micro Network Circuit with Differential Transmission Line (2004)
  • Author(s): Shinichiro, Gomi, Kohichi, Nakamura, Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Symposium on System-on-Chip, Tampere
  • Place of Presentation: Finland
  • Year and Date: 2004-11-18
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Pseudo Differential Transmission Line Structure on Si ULSI (2004)
  • Author(s): H. Sugita, H. Ito, S. Gomi, K. Okada, and K. Masu
  • Organizer: Advanced Metallization Conference(AMC)
  • Place of Presentation: San Diego, CA
  • Year and Date: 2004-10-19
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] ″Wire Length Distribution of SoC considering Macro Block Shapes (2004)
  • Author(s): T. Kyogoku, H. Nakashima, J. Inoue, N. Takagi, H. Shinoki, K. Okada and K. Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies
  • Place of Presentation: Kanazawa
  • Year and Date: 2004-10-19
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Dynamic Reconfigurable RF Circuit Design (2004)
  • Author(s): K. Okada, Y. Yoshihara, H. Sugawara, and K. Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies,
  • Place of Presentation: Kanazawa
  • Year and Date: 2004-10-19
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Pseudo Differential Transmission Line Structure on Si ULSI (2004)
  • Author(s): Hideyuki, Sugita, Hiroyuki, Ito, Shinichiro, Gomi, Kenichi, Okada, Kazuya, Masu
  • Organizer: Advanced Metallization Conference (AMC)
  • Place of Presentation: San Diego
  • Year and Date: 2004-10-19
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Wire Length Distribution of SoC considering Macro Block Shapes (2004)
  • Author(s): Takanori, Kyogoku, Hidenari, Nakashima, Junpei, Inoue, Naohiro, Takagi, Hiyouko, Shinoki, Kenichi, Okada, Kazuya, Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies
  • Place of Presentation: Kanazawa
  • Year and Date: 2004-10-19
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Dynamic Reconfigurable RF Circuit Design (2004)
  • Author(s): Kenichi, Okada, Yoshiaki, Yoshihara, Hirotaka, Sugawara, Kazuya, Masu
  • Organizer: The Workshop on Synthesis And System Integration of Mixed Information Technologies
  • Place of Presentation: Kanazawa
  • Year and Date: 2004-10-19
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] ″Wide-Range RF Variable Inductor on Si CMOS Chip with MEMS Actuator (2004)
  • Author(s): H. Sugawara, Y. Yoshihara, H. Ito, K. Okada, and K. Masu
  • Organizer: IEEE European Microwave Conference(EuMC),
  • Place of Presentation: Amsterdam
  • Year and Date: 2004-10-13
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Wide-Range RF Variable Inductor on Si CMOS Chip with MEMS Actuator (2004)
  • Author(s): Hirotaka Sugawara, Yoshiaki Yoshihara, Hiroyuki Ito, Kenichi Okada, Kazuya Masu
  • Organizer: IEEE European Microwave Conference (EuMC)
  • Place of Presentation: Amsterdam
  • Year and Date: 2004-10-13
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Differential Transmission Line Interconnect for High Speed and Low Power Global Wiring (2004)
  • Author(s): S. Gomi, K. Nakamura, H. Ito, K. Okada, and K. Masu
  • Organizer: IEEE Custom Integrated Circuits Conference(CICC)
  • Place of Presentation: Orland, Florida
  • Year and Date: 2004-10-05
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Differential Transmission Line Interconnect for High Speed and Low Power Global Wiring (2004)
  • Author(s): Shinichiro, Gomi, Kohichi, Nakamura, Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Custom Integrated Circuits Conference
  • Place of Presentation: Orland, Florida
  • Year and Date: 2004-10-05
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Pseudo Differential Transmission Line Structure on Si ULSI (2004)
  • Author(s): H. Sugita, H. Ito, S. Gomi, K. Okada, and K. Masu
  • Organizer: Advanced Metallization Conference Asian Session(ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2004-09-28
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Pseudo Differential Transmission Line Structure on Si ULSI (2004)
  • Author(s): Hideyuki, Sugita, Hiroyuki, Ito, Shinichiro, Gomi, Kenichi, Okada, Kazuya, Masu
  • Organizer: Advanced Metallization Conference Asian Session (ADMETA)
  • Place of Presentation: Tokyo
  • Year and Date: 2004-09-28
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] CVD-Al/PVD-Al Flow technology for Large Aspect Ratio Contact Hole Filling in Si ULSI Multilevel Interconnection, (2004)
  • Author(s): K. Masu, Manabu Sakamoto, Masanobu Hatanaka, Michio Ishikawa, and Yuji Furumura,
  • Organizer: The Seventh China-Japan Symposium on Thin Films
  • Place of Presentation: Chengdu, China
  • Year and Date: 2004-09-20
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] CVS-Al/PVD-Al Flow Technology for Large Aspect Ratio Contact Hole Filling in Si ULSI Multilevel Interconnection (2004)
  • Author(s): Kazuya, Masu, Manabu, Sakamoto, Masanobu, Hatanaka, Michio, Ishikawa, Yuji, Furumura
  • Organizer: Proceedings of the Seventh China-Japan Symposium on Thin Films
  • Place of Presentation: Chengdu, China
  • Year and Date: 2004-09-20
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Small Area Snake Inductor on Si RF CMOS Chip (2004)
  • Author(s): H. Sugawara, K. Okada and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Twisted Differential Transmission Line Structure for EMI Noise Reduction at Global Interconnect in Si LSI (2004)
  • Author(s): H. Ito, S. Gomi, H. Sugita, K. Okada, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High-Speed Transmission Circuit for Micro Network on Si ULSI (2004)
  • Author(s): S. Gomi, K. Nakamura, H. Ito, H. Sugita, K. Okada, and K, Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] in-vivo Wireless Communication System for Bio MEMS Sensors, (2004)
  • Author(s): K. Okada, T. Yamada, T. Uezono, K. Masu, A. Oki, and Y. Horiike
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Optimization Technique of Number of Interconnect Layers and Circuit Area Based on Wire Length Distribution (2004)
  • Author(s): T. Kyogoku, J. Inoue, H. Nakashima, K. Okada, and K. Masu
  • Organizer: International Conference on Solid State Devices and Materials(SSDM)
  • Place of Presentation: Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Small Area Snake Inductor on Si RF CMOS Chip (2004)
  • Author(s): Hirotaka, Sugawara, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials, Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Twisted Differential Transmission Line Structure for EMI Noise Reduction at Global Interconnect in Si LSI (2004)
  • Author(s): Hiroyuki, Ito, Shinichiro, Gomi, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials, Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High-Speed Transmission Circuit for Micro Network on Si ULSI (2004)
  • Author(s): Shinichiro, Gomi, Kohichi, Nakamura, Hiroyuki, Ito, Hideyuki, Sugita, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials, Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] in-vivo Wireless Communication System for Bio MEMS Sensors (2004)
  • Author(s): Kenichi, Okada, Tomohiro, Yamada, Takumi, Uezono, Kazuya, Masu, Akio, Oki, Yasuhiro, Horiike
  • Organizer: International Conference on Solid State Devices and Materials, Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] Optimization Technique of Number of Interconnect Layers and Circuit Area Based on Wire Length Distribution (2004)
  • Author(s): Takanori, Kyogoku, Junpei, Inoue, Hidenari, Nakashima, Kenichi, Okada, Kazuya, Masu
  • Organizer: International Conference on Solid State Devices and Materials, Funabori
  • Year and Date: 2004-09-16
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High-Q Variable Inductor Using Redistributed Layers for Si RF Circuits (2004)
  • Author(s): H. Sugawara, H. Ito, K. Okada, K. Itoi, M. Sato, H. Abe and K. Masu
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: Atlanta, GA
  • Year and Date: 2004-09-08
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Wide Tuning Range CMOS VCO using Variable Inductor (2004)
  • Author(s): Y. Yoshihara, H. Sugawara, H. lto, K. Okada and K. Masu
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: Atlanta, GA
  • Year and Date: 2004-09-08
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] High-Q Variable Inductor Using Redistributed Layers for Si RF Circuits (2004)
  • Author(s): Hirotaka, Sugawara, Hiroyuki, Ito, Kenichi, Okada, Kazuhisa, Itoi, Masakazu, Sato, Hiroshi, Abe, Kazuya, Masu
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: Atlanta
  • Year and Date: 2004-09-08
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] A Wide Tuning Range CMOS VCO using Variable Inductor (2004)
  • Author(s): Yoshiaki, Yoshihara, Hirotaka, Sugawara, Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
  • Place of Presentation: Atlanta
  • Year and Date: 2004-09-08
  • Description: 「研究成果報告書概要(欧文)」より
• [Presentation] High Speed and Low Power Global Interconnect IP with Differential Transmission Line and Driver-Receiver Circuits (2004)
  • Author(s): S. Gomi, K. Nakamura, H. Ito, K. Okada and K. Masu
  • Organizer: IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
  • Place of Presentation: Fukuoka
  • Year and Date: 2004-08-05
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Differential Transmission Line Structure for Over 10 Gbps Signal Transmission at Global Interconnect in Si ULSI (2004)
  • Author(s): H. Ito, S. Gomi, H. Sugita, K. Okada, and K. Masu
  • Organizer: IEEE Asia-Pacific Conference on Advanced System Integrated Circuits Designer Forum
  • Place of Presentation: Fukuoka
  • Year and Date: 2004-08-05
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Reconfigurable RF Circuit Design for Multi-band Wireless Chip (2004)
  • Author(s): Y. Yoshihara, H. Sugawara, H. lto, K. Okada, and K. Masu
  • Organizer: IEEE Asia-Pacific Conference on Advanced System Integrated Circuits Designer Forum
  • Place of Presentation: Fukuoka
  • Year and Date: 2004-08-05
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] Near Field Communication Chip using PIM for Bio Sensor (2004)
  • Author(s): K. Okada, T. Yamada, T. Uezono, K. Masu, A. Oki, and Y. Horiike
  • Organizer: IEEE Asia-Pacific Conference on Advanced System Integrated Circuits Designer Forum
  • Place of Presentation: Fukuoka
  • Year and Date: 2004-08-05
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Wide Tunable LC-VCO using Variable Inductor (2004)
  • Author(s): Y. Yoshihara, H. Sugawara, H. lto, K. Okada and K. Masu
  • Organizer: Workshop on Wireless Circuits and Systems,
  • Place of Presentation: Vancouver, Canada
  • Year and Date: 2004-05-21
  • Description: 「研究成果報告書概要(和文)」より
• [Presentation] A Wide Tunable LC-VCO using Variable Inductor (2004)
  • Author(s): Yoshiaki, Yoshihara, Hirotaka, Sugawara, Hiroyuki, Ito, Kenichi, Okada, Kazuya, Masu
  • Organizer: Workshop on Wireless Circuits and Systems, Vancouver
  • Place of Presentation: Canada
  • Year and Date: 2004-05-21
  • Description: 「研究成果報告書概要(欧文)」より
• [Remarks] 「研究成果報告書概要(和文)」より
  • URL: http://masu-www.pi.titech.ac.jp/