2007 Fiscal Year Final Research Report Summary
MIMO Block Coding High Throughput Wireless LAN Chip Design and its Application to Ubiquitous Networks
| Project/Area Number |
16360190
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Communication/Network engineering
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| Research Institution | Kyushu Institute of Technology |
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Principal Investigator |
OCHI Hiroshi Kyushu Institute of Technology, Faculty of Computer Science and Systems Engineering, Professor (50185617)
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| Co-Investigator(Kenkyū-buntansha) |
OONO Syuuichi Hiroshima University, Dept. of Engineerting research, Associate professor (70273919)
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| Project Period (FY) |
2004 – 2007
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| Keywords | MIMO / OFDM / RTL |
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| Research Abstract |
The aim of this project is to develop a high throughput MIMO wireless LAN chip. The obtained results in each year are following, respectively.
2004 : Algorithm and architecture design in terms of up to 600Mbps WilAN system including IEEE802.11n draft specification. We have developed a combined MIMO decode algorithm capable of STBC and LST MIMO encoding which can increase data rate and coverage, simultaneously.
2005 : An architecture design and verification were carried out under fixed point arithmetic in order to verify the design feasibility towards an actual ASIC chip design.
2006 : RTL design for each IPs.
2007 : FPGA prototyping in terms of 600Mbps MIMO Tx-Rx system. We have obtained desired bit error performance under some fading channel models.
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