2017 Fiscal Year Final Research Report
Development of Technologies of High Performance Computing for Accuracy Assurance
| Project/Area Number |
16K12432
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| Research Category |
Grant-in-Aid for Challenging Exploratory Research
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| Allocation Type | Multi-year Fund |
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| Research Field |
High performance computing
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| Research Institution | Nagoya University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
荻田 武史 東京女子大学, 現代教養学部, 准教授 (00339615)
尾崎 克久 芝浦工業大学, システム理工学部, 准教授 (90434282)
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| Research Collaborator |
ICHIMURA Syuntaro
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| Project Period (FY) |
2016-04-01 – 2018-03-31
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| Keywords | 高精度行列-行列積 / 分散並列化 / 反復改良 / ベンチマーク / 精度保証 / スレッド並列化 / 疎行列化 / PBLAS |
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| Outline of Final Research Achievements |
We establish new implementation methods and performance evaluation for high-precision matrix-matrix multiplication (HP_GEMM). A high-performance thread parallelization method for HP_GEMM is developed by sparselization to reduce computational complexities. In addition, we evaluate several implementation methods with an existing supercomputer. The implementations are utilizing with sparse storage formats, such as CRS and ELL, and dense matrix-matrix multiplication DGEMM, and implementations of sparse matrix-vector multiplications to increase efficiency of threads execution with problem-level parallelisms. Performance of thread execution of the implementations is clarified by the performance evaluation.
We discuss theory, implementation, and evaluation for accuracy of HP_GEMM. In particular, we develop an algorithm to establish rounding for the immediate floating-point neighbors in error-free transformation of the matrix-matrix computations.
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| Free Research Field |
高性能計算
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