High-frequency device modeling by network synthesis

2018 Fiscal Year Final Research Report

• Project/Area Number: 16K14269
• Research Category: Grant-in-Aid for Challenging Exploratory Research
• Allocation Type: Multi-year Fund
• Research Field: Communication/Network engineering
• Research Institution: Hiroshima University
• Principal Investigator: Amakawa Shuhei 広島大学, 先端物質科学研究科, 准教授 (40431994)
• Research Collaborator: FUJISHIMA Minoru
• Project Period (FY): 2016-04-01 – 2019-03-31
• Keywords: デバイスモデル / 高周波回路 / 回路合成 / 伝送線路

Outline of Final Research Achievements

In this research, we aimed to build a basic technology to generate a device model for high frequency circuits with physical property in the circuit theoretical sense by automatic circuit synthesis based on measurement data. First, the synthesis method of one-port network including frequency dependent resistors was examined, and the existing theory was extended. We applied this to the modeling of CMOS transmission lines and created a program to generate a model from measured data (S-parameters). We also proposed a method to estimate the characteristic impedance of the transmission line to several hundreds of gigahertz by applying modeling technology. For the MOSFET, an approximation formula of current-voltage characteristics was obtained from S-parameters using a neural network.

Free Research Field

集積回路

Academic Significance and Societal Importance of the Research Achievements

本研究の成果は，具体例としては数百ギガヘルツまでの周波数を含むサブテラヘルツ帯を利用した無線通信用集積回路の研究開発に資するものである．事実，研究成果である測定法とモデリング技術を利用して作成したCMOS集積回路上の伝送線路のモデルの一部は，300 GHz帯で動作するCMOSトランシーバ回路の設計に利用した．このトランシーバは，実測で80ギガビット毎秒の高速で通信できることが確認できた．今後もこれ以外の高周波集積回路の研究開発にも役立つものと期待される．