Development of new barrier material of interfacial-layer-free for ultrafine TSV

2019 Fiscal Year Final Research Report

• Project/Area Number: 17K06337
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electronic materials/Electric materials
• Research Institution: Kitami Institute of Technology
• Principal Investigator: Sato Masaru 北見工業大学, 工学部, 准教授 (10636682)
• Co-Investigator(Kenkyū-buntansha): 武山 眞弓 北見工業大学, 工学部, 教授 (80236512)
• Project Period (FY): 2017-04-01 – 2020-03-31
• Keywords: 3次元集積回路 / シリコン貫通ビア / 拡散バリヤ / 絶縁バリヤ / TiNx膜 / ZrNx膜 / HfNx膜

Outline of Final Research Achievements

In recent years, since the limit of miniaturization is approaching in the field of LSI, three-dimensional integration technology that enables high integration without miniaturization is being actively developed. Through-Si via (TSV) is drawing attention as one of the wiring technologies for stacking wafers and chips. Since TSVs occupy a much larger area than LSIs occupy, the TSV wiring as fine as possible is required. On the other hand, in the formation of TSV wiring, since the heat resistance of the material and the process temperature differ depending on the TSV process, it is also required to maintain the reliability of the wiring in each case. In this study, the use of nitrides of Group IVa elements yielded the very useful results of forming a thin barrier necessary for fine TSV wiring and adding material properties for improving the reliability of wiring.

Free Research Field

電子・電気材料工学

Academic Significance and Societal Importance of the Research Achievements

本研究成果によって、配線の信頼性を向上させることが期待できる薄いバリヤが実現できる見通しが立った。このような結果から、同じ材料系で安定した系を実現できるという成果自体が新規性があり、今後のTSVプロセスや材料開発に大きく影響を与えることが考えられるため、次世代集積回路の分野の発展に大きく貢献できることが期待される。