2018 Fiscal Year Final Research Report
Self-Convergence Mechanism of Transistor Characteristics Variability for 0.1V Operation
| Project/Area Number |
17K18866
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| Research Category |
Grant-in-Aid for Challenging Research (Exploratory)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Electrical and electronic engineering and related fields
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| Research Institution | The University of Tokyo |
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Principal Investigator |
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| Project Period (FY) |
2017-06-30 – 2019-03-31
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| Keywords | MOSFET / 大規模集積回路 / 特性ばらつき / SRAM / 低電圧 |
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| Outline of Final Research Achievements |
The objective of this study is to lower the operation voltage of very large scale integration (VLSI) for ultra-low energy operation. A self-convergence method of transistor characteristics variability in static random access memory (SRAM) by applying multiple stress voltage has been proposed. The experimental results showed that the minimum operation voltage of SRAM was lowered by the self-convergence mechanism.
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| Free Research Field |
集積デバイス工学
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| Academic Significance and Societal Importance of the Research Achievements |
大規模集積回路(VLSI)の課題の一つは消費電力の削減であり，そのほぼ唯一の方法は電源電圧の低減である．ところが，VLSIを構成する微細トランジスタの特性ばらつきのため電源電圧の低減は困難であった．本研究で提案した自己収束機構により，SRAMと呼ばれるメモリの電源電圧が下げられることが明らかとなった．本研究は将来のVLSIの低消費電力化に繋がる成果である．
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