Nano-structure functional devices based Ge-based channels

2008 Fiscal Year Self-evaluation Report

• Project/Area Number: 18063005
• Research Category: Grant-in-Aid for Scientific Research on Priority Areas
• Allocation Type: Single-year Grants
• Review Section: Science and Engineering
• Research Institution: The University of Tokyo
• Principal Investigator: 高木 信一 The University of Tokyo, 大学院・工学系研究科, 教授 (30372402)
• Project Period (FY): 2006 – 2009
• Keywords: ゲルマニウム / MOSFET / GOI / 移動度 / 面方位 / スピン / 強磁性

Research Abstract

微細化にともなうシリコンMOSトランジスタの性能の物理限界を打破できる素子として、GeチャネルMOSFETに注目し、MOS2次元キャリア系の物性とキャリア輸送特性を検証することを通じて、Ge反転層に係る新物性と量子効果を最大限に利用し、極薄Ge-On-Insulator(GOI)構造やひずみの有効利用、面方位・チャネル方位の選択・メタルソースドレインの利用などを通じて、最適Ge CMOS構造の素子設計と実証を目指す。また、上記Ge CMOS構造におけるソースドレインまたはチャネルに強磁性によるスピン制御の機能を導入し, スピン依存伝導による新規な機能を付加した新しい高機能CMOS素子を実現する。

Research Products

• [Journal Article] 界面制御層を用いた高性能Ge MOSトランジスタ (2009)
  • Author(s): 高木信一, 山本豊二, 田岡紀之, 池田圭司
  • Journal Title: 応用物理 vol. 78, no. 1 Pages: 37-42
• [Journal Article] ポストスケーリング時代のCMOSデバイス技術 (2009)
  • Author(s): 高木信一
  • Journal Title: 電子情報通信学会誌 vol. 92, No. 1 Pages: 43-48
• [Journal Article] スピン機能MOSFETによる新しいエレクトロニクスの展開 (2009)
  • Author(s): 菅原聡
  • Journal Title: 応用物理 vol. 78, no. 3 Pages: 236-241
• [Journal Article] Carrier-transport-enhanced channel CMOS for improved power consumption and performance (2008)
  • Author(s): S. Takagi, T. Irisawa, T. Tezuka, T. Numata, S. Nakaharai, N. Hirashita, Y. Moriyama, K. Usuda, E. Toyoda, S. Dissanayake, M. Shichijo, R. Nakane, S. Sugahara, M. Takenaka and N. Sugiyama
  • Journal Title: IEEE Trans. Electron Devices(Invited Paper) Vol. 55, No. 1 Pages: 21-39
• [Journal Article] Evidence of low interface trap density in GeO2/Ge Metal-Oxide-Semiconductor structures fabricated by thermal oxidation (2008)
  • Author(s): H. Matsubara, T. Sasada, M. Takenaka and S. Takagi
  • Journal Title: Appl. Phys. Lett. Vol. 93, Issue. 3 Pages: 032104
• [Journal Article] Formation of Si- and Ge-based Full-Heusler Alloy Thin Films Using SOI and GOI Substrates for the Half-Metallic Source and Drain of Spin Transistors (2008)
  • Author(s): Y. Takamura, A. Nishijima, Y. Nagahama, R. Nakane and S. Sugahara
  • Journal Title: ECS Transactions Vol. 16 Pages: 945-952
• [Journal Article] (110) Ultra-thin GOI Layers Fabricated by Ge Condensation Method (2008)
  • Author(s): S. Dissanayake, Y. Shuto, S. Sugahara, M. Takenaka and S. Takagi
  • Journal Title: Thin Solid Films Vol. 517, Issue 1 Pages: 178-180
• [Journal Article] Ultrathin Ge-On-Insulator Metal Source/Drain p-Channel MOSFETs Fabricated By Low Temperature Molecular Beam Epitaxy (2007)
  • Author(s): T. Uehara, H. Matsubara, S. Sugahara and S. Takagi
  • Journal Title: Jpn. J. Appl. Phys. vol. 46, no. 4B Pages: 2117- 2121
• [Journal Article] Mobility- Enhanced Device Technologies Using SiGe/Ge MOS Channels (2007)
  • Author(s): S. Takagi, T. Irisawa, T. Tezuka, S. Nakaharai, T. Numata, N. Hirashita, Y. Moriyama, K. Usuda, S. Dissanayake, M. Tekenaka, S. Sugahara and N. Sugiyama
  • Journal Title: ECS Trans. Vol. 11, No. 6 Pages: 61-74
• [Journal Article] Gate Dielectric Formation and MIS Interface Characterization on Ge (2007)
  • Author(s): S. Takagi, T. Maeda, N. Taoka, M. Nishizawa, Y. Morita, K. Ikeda, Y. Yamashita, M. Nishikawa, H. Kumagai, R. Nakane, S. Sugahara and N. Sugiyama
  • Journal Title: Microelectronic Engineering vol. 84, Issue 9-10 Pages: 2314-2319
• [Journal Article] Hole Mobility Enhancement of p-MOSFETs Using Global and Local Ge Channel Technologies (2006)
  • Author(s): S. Takagi, T. Tezuka, T. Irisawa, S. Nakaharai, T. Maeda, T. Numata, K. Ikeda and N. Sugiyama
  • Journal Title: Materials Science and Engineering: B Vol. 135, Issue. 3 Pages: 250- 255
• [Presentation] Interface-controlled Self-Align Source/Drain Ge pMOSFETs Using Thermally-Oxidized GeO2 Interfacial Layers (2008)
  • Author(s): Y. Nakakita, R. Nakane, T. Sasada, H. Matsubara, M. Takenaka and S. Takagi
  • Organizer: International Electron Device Meeting, pp. 877-880
  • Place of Presentation: San Francisco, USA
  • Year and Date: 20081215-17
• [Presentation] Effect of Annealing on (100) and (110) Oriented pseudo-GOI pMOSFETs Fabricated by Ge Condensation Method (2007)
  • Author(s): S. Dissanayake, S. Tanabe, S. Sugahara, M. Takenaka and S. Takagi
  • Organizer: 5th International Symposium on Control of Semiconductor Interfaces (ISCSI-V), pp. 233-234
  • Place of Presentation: Tokyo, Japan
  • Year and Date: 20071100
• [Presentation] Mobility-Enhanced MOS Device Technologies in Nano-CMOS era (plenary talk) (2007)
  • Author(s): S. Takagi
  • Organizer: Device Research Conference (DRC), pp. 5-8
  • Place of Presentation: South Bend, USA
  • Year and Date: 20070600
• [Presentation] Gate Dielectric Formation and MIS Interface Characterization on Ge (invited) (2007)
  • Author(s): S. Takagi, T. Maeda, N. Taoka, M. Nishizawa, Y. Morita, K. Ikeda, Y. Yamashita, M. Nishikawa, H. Kumagai, R. Nakane, S. Sugahara and N. Sugiyama
  • Organizer: 15th Insulatring Films on Semiconductors (INFOS2007), pp. 2314-2319
  • Place of Presentation: Athens, Greece
  • Year and Date: 20070600
• [Presentation] (110) Ultra-thin GOI p-MOSFETs Fabricated by Ge Condensation Method (2007)
  • Author(s): S. Dissanayake, H. Kumagai, T. Uehara, Y. Shuto, S. Sugahara and S. Takagi
  • Organizer: 5th International Conference on SiGe(C) Epitaxy and Heterostructures, pp. 57-58
  • Place of Presentation: Marseille, France
  • Year and Date: 20070500
• [Book] Electronic Device Architectures for the Nano-CMOS Era - From Ultimate CMOS Scaling to Beyond CMOS Devices, Chapter 5 (2008)
  • Author(s): S. Takagi, T. Tezuka, T. Irisawa, S. Nakaharai, T. Numata, K. Usuda, N. Sugiyama, M. Shichijo, R. Nakane and S. Sugahara
  • Publisher: Pan Stanford Publishing
• [Remarks] Sanjeewa Dissanayake, 第22回(2007年春季) 応用物理学会講演奨励賞 受賞(Sanjeewa Dissanayake, 熊谷寛, 周藤悠介, 菅原聡, 高木信一, "酸化濃縮法により作製された超薄膜(110)面GOIp-MOSFET")
• [Remarks] 高木信一、応用物理学会フェロー表彰 受賞.「MOSランジスターの輸送現象の解明と高移動度化の研究」(2008年9月).
• [Remarks] Yosuke Nakakita、IEEE EDS Japan Chapter Student Award, "Interface-Controlled Self-Align Source/Drain Ge PMOSFETs Using Thermally-Oxidized GeO2 Interfacial Layers(IEDM2008)", (2009年1月)