2007 Fiscal Year Final Research Report Summary
Security Enhancement and Power Reduction of Networks based on Machine learning Approach with VLSI Technology
| Project/Area Number |
18500048
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | The University of Electro-Communications |
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Principal Investigator |
ABE Koki The University of Electro-Communications, 電気通信学部, 教授 (00017443)
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| Project Period (FY) |
2006 – 2007
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| Keywords | VLSI / Networks / Security enhancement / Performance improvement / Low power consumption / Intrusion detection / Congestion control / Branch prediction |
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| Research Abstract |
I conducted research from various aspects to show that machine learning approaches combined with VLSI technology are effective for security enhancement, performance improvement, and power reduction of networks and their components. Research achievements are summarized as follows:
1. Security enhancement of networks utilizing VLSI technology
I proposed an architecture for a fast and accurate signature-based intrusion detection system (IDS) where hardware is used at upstream steps requiring high speed, and software is used at downstream steps requiring high accuracy. I verified the effect by a simulation experiment.
2. Power reduction and resource savings of networks
I proposed a new method for decreasing the power consumption of wireless networks by predicting the probability of packet collisions. I proposed a congestion control scheme which reduces the congestion of Internet links by machine learning approach to save the network resource and improve the fairness among data flows.
3. Improving the performance of processor based on machine learning approaches
I improved the performance of CPU as an component of networks using a low-cost and highly accurate branch prediction scheme based on a machine learning approach.
4. Enhancing the security of components using VLSI technology
I proposed a countermeasure against differential power analysis attacks to cryptosystems. The countermeasure is suitable for implementation on VLSI. I verified its effectiveness by experiments
5. Improvements of security, performance, quality, and power consumption of multimedia network communications
I proposed an architecture of two dimensional discrete wavelet transform (2D-DWT) to improve the performance and power savings, and utilized the architecture for image data authentication and tamper proofing. I improved the 2D-DWT algorithm to improve the performance and quality of tiling and restoring processes for image data.
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Research Products
(73 results)
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[Patent(Industrial Property Rights)] 特許2007
Inventor(s)
二ノ宮康之, 阿部公輝
Industrial Property Rights Holder
電気通信大学, 二ノ宮康之, 阿部公輝
Industrial Property Number
特願PCT/JP2007/51965
Filing Date
20070100
Description
「研究成果報告書概要(和文)」より
Overseas
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[Patent(Industrial Property Rights)] 特許2006
Inventor(s)
石原希実, 阿部公輝
Industrial Property Rights Holder
電気通信大学, 石原希実, 阿部公輝
Industrial Property Number
特願PCT/JP2007/51965
Filing Date
20061000
Description
「研究成果報告書概要(和文)」より
Overseas
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