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2019 Fiscal Year Annual Research Report

酸化濃縮法を用いた高性能薄膜Ge-On-Insulator FETに関する研究

Research Project

Project/Area Number 18J14311
Research InstitutionThe University of Tokyo

Principal Investigator

JO KWANGWON  東京大学, 工学系研究科, 特別研究員(DC2)

Project Period (FY) 2018-04-25 – 2020-03-31
KeywordsGe-on-insulator / SiGe / Ge / Ge condensation / Compressive strain / Tensile strain
Outline of Annual Research Achievements

We propose and demonstrate a new channel strain control technology enabling to realize both high performance tensile strain Ge-on-insulator (GOI) n-MOSFETs and compressive strain GOI p-MOSFETs on a same substrate. It is found that additional oxidation at 850 oC after Ge condensation changes the strain condition in GOI from 1.8 % compressive strain to 0.5% tensile strain, resulting in the electron mobility enhancement of 2.1. Furthermore, thinning GOI channel thickness introduces significant mobility enhancement attributable to GOI band modulation, leading to electron mobility of 777 cm2/Vs in n-MOSFETs with GOI thickness of 2.5 nm. For performance enhancement of p-MOSFETs, (110)-oriented SGOI formation by Ge condensation is studied. It is found that SGOI with the Ge fraction of 54 % maximizes the hole mobility from the viewpoints of both strain and Ge fractions. Record high hole mobility of 837 cm2/Vs is demonstrated with compressive strain (110) 27-nm-thick Si0.46G0.54OI p-MOSFETs, compared with mobility in planar GOI/SGOI p-MOSFETs reported so far. In addition, high hole mobility of 295 cm2/Vs is still maintained for 5-nm-thick extremely-thin body (110) Si0.46G0.54OI p-MOSFETs.
As a result aforementioned contents of our research were reported at 2019 International Electron Devices Meeting (IEDM), which is one of most famous conferences in the research field.

Research Progress Status

令和元年度が最終年度であるため、記入しない。

Strategy for Future Research Activity

令和元年度が最終年度であるため、記入しない。

  • Research Products

    (5 results)

All 2020 2019

All Journal Article (3 results) (of which Int'l Joint Research: 3 results) Presentation (1 results) (of which Int'l Joint Research: 1 results) Funded Workshop (1 results)

  • [Journal Article] p-Channel TFET Operation of Bilayer Structures With Type-II Heterotunneling Junction of Oxide- and Group-IV Semiconductors2020

    • Author(s)
      Kato Kimihiko、Jo Kwang-Won、Matsui Hiroaki、Tabata Hitoshi、Mori Takahiro、Morita Yukinori、Matsukawa Takashi、Takenaka Mitsuru、Takagi Shinichi
    • Journal Title

      IEEE Transactions on Electron Devices

      Volume: 67 Pages: 1880~1886

    • DOI

      10.1109/TED.2020.2975582

    • Int'l Joint Research
  • [Journal Article] Strain and surface orientation engineering in extremely-thin body Ge and SiGe-on-insulator MOSFETs fabricated by Ge condensation2019

    • Author(s)
      Jo K. - W.、Lim C.- M.、Kim W. - K.、Toprasertpong K.、Takenaka M.、Takagi S.
    • Journal Title

      IEDM conference paper

      Volume: 1 Pages: 1-3

    • DOI

      10.1109/IEDM19573.2019.8993595

    • Int'l Joint Research
  • [Journal Article] Impact of SiGe layer thickness in starting substrates on strained Ge-on-insulator pMOSFETs fabricated by Ge condensation method2019

    • Author(s)
      Jo Kwang-Won、Kim Wu-Kang、Takenaka Mitsuru、Takagi Shinichi
    • Journal Title

      Applied Physics Letters

      Volume: 114 Pages: 062101~062101

    • DOI

      https://doi.org/10.1063/1.5068713

    • Int'l Joint Research
  • [Presentation] Strain and surface orientation engineering in extremely-thin body Ge and SiGe-on-insulator MOSFETs fabricated by Ge condensation2019

    • Author(s)
      KWANG-WON JO、Lim C.- M.、Kim W. - K.、Toprasertpong K.、Takenaka M.、Takagi S.
    • Organizer
      2019 IEEE International Electron Devices Meeting (IEDM)
    • Int'l Joint Research
  • [Funded Workshop] SSDM20192019

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Published: 2021-01-27  

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