Control of defects and surface morphology on strained Si/SiGe/Si(110) structure using the ion implantation method

2020 Fiscal Year Final Research Report

• Project/Area Number: 18K04229
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Review Section: Basic Section 21050:Electric and electronic materials-related
• Research Institution: University of Yamanashi
• Principal Investigator: ARIMOTO Keisuke 山梨大学, 大学院総合研究部, 准教授 (30345699)
• Co-Investigator(Kenkyū-buntansha): 山中 淳二 山梨大学, 大学院総合研究部, 准教授 (20293441) ; 澤野 憲太郎 東京都市大学, 理工学部, 教授 (90409376)
• Project Period (FY): 2018-04-01 – 2021-03-31
• Keywords: 半導体結晶 / 電子デバイス / 結晶欠陥

Outline of Final Research Achievements

From computers and communication terminals to electric vehicles, the fundamental technologies of modern society are supported by semiconductor integrated circuits. The technologies in wide rage of applications are highly dependent on Si-based semiconductor materials, which can be seen from the rapid rise of their demand in recent years. Therefore, performance improvement of the semiconductor materials has a significant impact on many application areas. We are investigating physical properties of strained Si/SiGe/Si(110) structure with an aim to improve the carrier mobility. In fact, significant improvement of the hole mobility has been confirmed in this structure. In this study, impact of the ion implantation method and growth conditions on generation process of crystalline defects and surface morphology, which are fundamental for improvement of the carrier mobility, were investigated.

Free Research Field

半導体物理学

Academic Significance and Societal Importance of the Research Achievements

半導体集積回路の性能向上を支える材料技術としてキャリア移動度の向上を目指した研究が精力的に行われている。我々は高移動度半導体構造の一つとして歪みSi/SiGe/Si(110)構造に注目している。これはGeに迫る高正孔移動度を低い材料費・製造コストで実現できる優れた薄膜構造である。本研究では薄膜の形成プロセスが結晶欠陥形成や表面形状の発達過程に及ぼす影響及び結晶欠陥の形態が電気伝導特性に及ぼす影響について基礎的な知見を得ることができた。これらの研究結果は結晶欠陥の制御と表面平坦性の向上を可能とするものであり、更なる高移動度化の実現につながる成果である。