Archtecture of plasmonic logic circuit

2020 Fiscal Year Final Research Report

• Project/Area Number: 18K04282
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Review Section: Basic Section 21060:Electron device and electronic equipment-related
• Research Institution: Toyohashi University of Technology
• Principal Investigator: Fukuda Mitsuo 豊橋技術科学大学, 工学(系)研究科(研究院), シニア研究員 (50378262)
• Co-Investigator(Kenkyū-buntansha): 石川 靖彦 豊橋技術科学大学, 工学(系)研究科(研究院), 教授 (60303541)
• Project Period (FY): 2018-04-01 – 2021-03-31
• Keywords: 表面プラズモン / 論理演算回路 / 光集積回路 / プラズモニック導波路

Outline of Final Research Achievements

A cascadable full-adder operating with surface plasmons (compressional waves of electrons propagating on metal surface at velocity of light) was developed, and its performances were analytically and experimentally confirmed. For the plasmonic circuit design and operation analysis, design techniques were developed employing electromagnetic field analysis method (finite difference time domain method). For the plasmonic circuit fabrication, fabrication techniques were developed using a CMOS-transistor manufacturing line set in the inside campus. For evaluating the plasmonic circuits, a setup was developed by modifying a conventional scanning near-field optical microscope. As results of these technical developments, the operation as a cascadable full-adder was confirmed for the developed plasmonic circuit.

Free Research Field

フォトニクス

Academic Significance and Societal Importance of the Research Achievements

本研究の成果は光と電子が融合して高密度実装されたフォトニック集積回路の開発へ発展させることができる。さらに、表面プラズモンは光の速度で金属配線上を伝播するため、現在のシリコン集積回路等が抱えている信号遅延や消費電力などの問題を解決できる可能性がある。その結果、高度情報通信社会の高度化に向けた高速・大容量処理が可能なキーデバイスの創出に結び付く可能性がある。