2018 Fiscal Year Research-status Report
Neuromorphic processor using superconducting adiabatic quantum flux circuits
| Project/Area Number |
18K13801
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| Research Institution | Yokohama National University |
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Principal Investigator |
アヤラ クリストファー 横浜国立大学, 先端科学高等研究院, 特任教員(准教授) (90772195)
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| Project Period (FY) |
2018-04-01 – 2021-03-31
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| Keywords | superconductor / neuron / computing / adiabatic / sfq / aqfp / tensor / eda |
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| Outline of Annual Research Achievements |
This research investigates new computing approaches to deal with the demand of Big Data generated from IoT technology using superconductive neuromorphic architectures. This is a three year project in which the first year, we developed a top-down design environment for the design and evaluation of superconductive computing architectures. This was a critical step to give us a platform to carry out the design aspects of this research project during the second and third years. One of the major achievements is the successful demonstration of a circuit placement and routing tool (doi: 10.1109/TASC.2019.2900220) and a first-order superconductor-based circuit generator using the Verilog and Python development languages (to be published in FY2019).
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| Current Status of Research Progress |
Current Status of Research Progress
2: Research has progressed on the whole more than it was originally planned.
Reason
The progress of this research project is going rather smoothly so far. We have completed the major tasks for FY2018 which includes the development of top-down design environment which includes logic models, timing models, circuit generators/synthesizers, and a circuit placement-and-routing tool. We plan to publish an overview of this design environment in the next fiscal year. During this research period, we have also identified an alternative synthesis engine which can handle majority logic operations natively. This was unexpected as we initially thought that we had to develop such a tool ourselves. Right now this alternative synthesis engine needs to be adapted to properly map with our superconductor technology, which is what we plan to do in the early half of the next fiscal year.
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| Strategy for Future Research Activity |
We plan to publish an overview of the established design environment in FY2019. We will further enhance the design environment using alternative synthesis engines by creating a proper technology mapper in the early part of FY2019. However, the main focus is to use the current design environment to experiment and explore neuromorphic architectures. One of the most immediate neuromorphic designs to consider is a small scale implementation of a Tensor core datapath for accelerating artificial intelligence (AI) computing. This involves building a fused multiply-add architecture which we will explore at a small scale in FY2019. Furthermore, we will investigate other alternatives including digital-based integrate-fire neurons as well.
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| Causes of Carryover |
Articles purchased in this fiscal year actually cost a little less than estimated, resulting in a small amount of funds to be used in the next fiscal year. This extra amount will be used in the next fiscal year for travel expenses.
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