2009 Fiscal Year Final Research Report
Study on architectures of high-performance computers
| Project/Area Number |
19500041
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Nagoya University |
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Principal Investigator |
ANDO Hideki Nagoya University, 大学院・工学研究科, 教授 (40293667)
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| Project Period (FY) |
2007 – 2009
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| Keywords | データ / プリフェッチ |
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| Research Abstract |
This study proposed a data prefetch scheme that suppresses performance degradation due to slow main memory. Here, prefetching moves data from main memory to a cache before a processor requires them. Although many studies have been carried out, they are successful only for regular patterns like array accesses, which are highly predictable. On the other hand, this study proposed a general prefetch scheme, which allows to successfully handle various data access patters including irregular patterns.
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Research Products
(15 results)
