• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to project page

2009 Fiscal Year Final Research Report

Advances and Applications of Hardware Specialization Techniques

Research Project

  • PDF
Project/Area Number 19500042
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionToyohashi University of Technology

Principal Investigator

ICHIKAWA Shuichi  Toyohashi University of Technology, 工学部, 准教授 (70262855)

Project Period (FY) 2007 – 2009
Keywords計算機システム / 小型化 / 高速化 / Field Programmable Gate Array (FPGA) / 部分評価 / 多様化 / セキュリティ / 組込みシステム
Research Abstract

If the input of logic circuit is partially or wholly predetermined, the circuit can be optimized to reduce the logic scale and to improve the maximum operational frequency. This technique is called "hardware specialization". Since the derived circuit depends on the predetermined input data, it is reasonable to adopt reconfigurable logic devices (e.g., FPGA) to implement specialized circuit. In this project, the following three cases were examined as practical examples of hardware specialization techniques : (1) conversion of control software into logic circuit for small and highly responsive control systems, (2) diversification of processor for secure applications by giving different instruction sets for each instance, and (3) optimization of computer cluster configurations for a specific set of application and data size.

  • Research Products

    (16 results)

All 2010 2009 2008 Other

All Journal Article (3 results) (of which Peer Reviewed: 3 results) Presentation (12 results) Remarks (1 results)

  • [Journal Article] Optimizing Process Allocation of Parallel Programs for Heterogeneous Clusters2009

    • Author(s)
      Shuichi Ichikawa, Sho Takahashi, Yuu Kawai
    • Journal Title

      Concurrency and Computation: Practice and Experience Vol.21,No,4

      Pages: 475-507

    • Peer Reviewed
  • [Journal Article] Diversification of Processors Based on Redundancy in Instruction Set2008

    • Author(s)
      Shuichi Ichikawa, Takashi Sawada, Hisashi Hata
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol.E91-A,No.1

      Pages: 211-220

    • Peer Reviewed
  • [Journal Article] An FPGA implementation of hard-wired sequence control system based on PLC software

    • Author(s)
      Shuichi Ichikawa, Masanori Akinaka, Hisashi Hata, Ryo Ikeda, Hiroshi Yamamoto
    • Journal Title

      IEEJ Transactions on Electrical and Electronic Engineering (to appear)

    • Peer Reviewed
  • [Presentation] 振動抑制を考慮した追従システムのFPGAによる実装2010

    • Author(s)
      手塚康瑛, 市川周一, 野田善之
    • Organizer
      電子情報通信学会技術研究報告RECONF
    • Place of Presentation
      (to appear)
    • Year and Date
      20100000
  • [Presentation] ディジタルフィルタのハードウェア特殊化と制振制御への応用2010

    • Author(s)
      手塚康瑛, 市川周一, 野田善之
    • Organizer
      電子情報通信学会技術研究報告RECONF2009-67
    • Year and Date
      20100000
  • [Presentation] 制御モデルからの専用回路生成とFPGAへの実装2009

    • Author(s)
      手塚康瑛, 市川周一, 野田善之, 森田定幸
    • Organizer
      平成21年度電気関係学会東海支部連合大会
    • Year and Date
      20090000
  • [Presentation] Estimating the Optimal Configuration of a Multi-Core Cluster: A Preliminary Study2009

    • Author(s)
      Shuichi Ichikawa, Shoichiro Takagi
    • Organizer
      Proceedings of the International Conference on Complex, Intelligent and Software Intensive Systems (CISIS 2009)
    • Year and Date
      20090000
  • [Presentation] 鍵埋め込み型AES暗号化回路のFPGAによる実装と評価2009

    • Author(s)
      松岡俊佑, 市川周一
    • Organizer
      電子情報通信学会2009年ソサイエティ大会
    • Year and Date
      20090000
  • [Presentation] マルチコアPCクラスタのためのプロセス配置法の検討2009

    • Author(s)
      吉田幸太郎, 市川周一
    • Organizer
      電子情報通信学会東海支部・平成20年度卒業研究発表会
    • Year and Date
      20090000
  • [Presentation] Estimating the Optimal Configuration of a Heterogeneous Cluster: the Case of NAS Parallel Benchmarks2009

    • Author(s)
      Shuichi Ichikawa, Masayoshi Asakura, Yusuke Sakumoto
    • Organizer
      Proceedings of 8th International Conference on Applications and Principles of Information Science (APIS 2009)
    • Year and Date
      20090000
  • [Presentation] メタスタビリティを利用した真性乱数生成回路のFPGAによる実装2009

    • Author(s)
      畑尚志, 市川周一
    • Organizer
      第138回SLDM研究会
    • Year and Date
      20090000
  • [Presentation] RSラッチのメタスタビリティを利用した真性乱数生成回路2009

    • Author(s)
      市川周一, 畑尚志
    • Organizer
      2009年暗号と情報セキュリティシンポジウム(SCIS2009)
    • Year and Date
      20090000
  • [Presentation] Constructing Execution-Time Estimation Models from Diverse Processing Elements of Heterogeneous Clusters2008

    • Author(s)
      Shuichi Ichikawa, Yuu Kawai
    • Organizer
      Proceedings of IEEE TENCON 2008
    • Year and Date
      20080000
  • [Presentation] マルチコアPCクラスタの最適構成予測手法の検討2008

    • Author(s)
      市川周一, 高木翔一朗
    • Organizer
      電子情報通信学会2008年総合大会
    • Year and Date
      20080000
  • [Presentation] 組込みシステムのための実時間性能計測手法の開発2008

    • Author(s)
      手塚康瑛, 市川周一
    • Organizer
      電子情報通信学会2008年総合大会
    • Year and Date
      20080000
  • [Remarks]

    • URL

      http://meta.tutkie.tut.ac.jp/~ichikawa/

URL: 

Published: 2011-06-18   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi