On a noise convolutional neural network

2023 Fiscal Year Final Research Report

• Project/Area Number: 19H04078
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Single-year Grants
• Section: 一般
• Review Section: Basic Section 60040:Computer system-related
• Research Institution: Tohoku University (2023); Tokyo Institute of Technology (2019-2022)
• Principal Investigator: Nakahara Hiroki 東北大学, 未踏スケールデータアナリティクスセンター, 教授 (20624414)
• Co-Investigator(Kenkyū-buntansha): 佐野 健太郎 国立研究開発法人理化学研究所, 計算科学研究センター, チームリーダー (00323048) ; 佐藤 真平 信州大学, 学術研究院工学系, 准教授 (80782763)
• Project Period (FY): 2019-04-01 – 2024-03-31
• Keywords: AI / Machine learning / FPGA

Outline of Final Research Achievements

We derived that the noise CNN is equivalent to the existing CNN. We designed a dedicated circuit for noise CNN and implemented an FPGA prototype. We investigated a noise generation circuit suitable for a configuration that combines a noise generation circuit and 1×1 size convolution, and implemented the circuit. We demonstrated the superiority of the proposed method compared to GPU. We further improved the performance of the noisy CNN circuit by applying existing parameter reduction methods such as bit reduction and pruning. Since noise convolution is equivalent to existing convolution, we showed that it can be combined with existing methods. We also constructed an FPGA cluster environment to speed up the learning of noisy CNNs, and investigated the learning method for noisy CNNs.

Free Research Field

AI, Machine learning, FPGA

Academic Significance and Societal Importance of the Research Achievements

電力やデバイスの制約で実現できなかった高度な認識技術が組込み機器に実現できた。また、設計のボトルネックであった学習時間が短縮された。研究期間後は、専用チップ化による更なる性能向上とコスト削減に取り組む予定である。