2023 Fiscal Year Final Research Report
SoC Defect Level Estimation and Reduction by Multi-Model Sampling
| Project/Area Number |
19K11884
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Review Section |
Basic Section 60040:Computer system-related
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| Research Institution | Nihon University |
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Principal Investigator |
ARAI Masayuki 日本大学, 生産工学部, 教授 (10336521)
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| Project Period (FY) |
2019-04-01 – 2024-03-31
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| Keywords | マルチモデルサンプリング / 欠陥レベル / ウェハマップ欠陥パターン |
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| Outline of Final Research Achievements |
In this study, we mainly focused on (A) development and improvement of AI-based defect location and pattern estimation methods, and (B) test pattern generation methods based on the results of defect behavior analysis. For (A), we developed a method to estimate defect locations and patterns with high accuracy based on a small amount of defect information, focusing on both LSI devices and layouts. For (B), we developed a test pattern generation method that takes into account defect behavior under power consumption constraints. The combination of these methods is expected to enable accurate estimation and reduction of defect levels in large-scale semiconductor devices.
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| Free Research Field |
ディペンダブルコンピューティング
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| Academic Significance and Societal Importance of the Research Achievements |
近年，半導体産業の構造が世界的に変化し，日本においては国内での最先端プロセスでの製造（ファブ）が一旦ほぼ断絶した後に回帰しつつある．本研究開発した要素技術の組合せによって，製造されたLSIの信頼性向上，および製造コスト削減が可能となると期待され，学術的意義および産業界に対する貢献は大きいと考えられる．
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