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2021 Fiscal Year Annual Research Report

HARFSR: A Hardware-Accelerated Real-time Sound Field Rendering System for Large-scale Sound Environments

Research Project

Project/Area Number 19K12092
Research InstitutionInstitute of Physical and Chemical Research

Principal Investigator

TAN Yiyu  国立研究開発法人理化学研究所, 計算科学研究センター, 研究員 (70743243)

Project Period (FY) 2019-04-01 – 2022-03-31
KeywordsFDTD / Sound field rendering / FPGA
Outline of Annual Research Achievements

This research investigates a hardware-accelerated real-time sound field rendering system for large-scale sound space. During the final year, the following topics were investigated.
(1)optimization of the prototype machine. The spatial blocking and temporal blocking were applied to alleviate external memory bandwidth and reuse data, respectively. Furthermore, system performance was evaluated in the case of different layer sizes and different number of nodes computed in parallel to explore the optimal system parameters.
(2)development of a virtual concert hall. Sound propagation in a virtual sound space with dimension being 16m×8m×8m was analyzed by the proposed sound field rendering system. An impulse signal was as an incidence to the system, and the computation time, sampling rate, and computational throughput were evaluated in the case of different rendering algorithms.
(3)Generic hardware platform to solve wave propagation problems. In principle, the computation of the FDTD-based wave equation is stencil computation. Systolic array and coarse-grained reconfigurable architecture (CGRA) were explored for stencil computation to develop a generic hardware-accelerated platform for wave propagation problems.
During the whole project period, high-order FDTD method was developed at algorithm level to reduce memory requirement. At architectural level, the systolic array and CGRA were studied to speed up computation. The research results will benefit the technology of high-fidelity auditory perception in large-scale sound environments.

  • Research Products

    (10 results)

All 2022 2021

All Journal Article (1 results) (of which Int'l Joint Research: 1 results,  Peer Reviewed: 1 results) Presentation (9 results) (of which Int'l Joint Research: 5 results)

  • [Journal Article] FPGA-based Acceleration of FDTD Sound Field Rendering2021

    • Author(s)
      Yiyu Tan, Toshiyuki Imamura, and Masaaki Kondo
    • Journal Title

      Journal of the Audio Engineering Society

      Volume: 69 Pages: 542-556

    • DOI

      10.17743/jaes.2021.0025

    • Peer Reviewed / Int'l Joint Research
  • [Presentation] An FPGA-based Accelerator for Sound Field Rendering with High-order FDTD2022

    • Author(s)
      Yiyu Tan, Toshiyuki Imamura, and Masaaki Kondo
    • Organizer
      International Conference on High Performance Computing in Asia-Pacific Region
    • Int'l Joint Research
  • [Presentation] RIKEN CGRA: Reconfigurable Data-Driven Architecture for Future HPC2022

    • Author(s)
      Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
    • Organizer
      International Conference on High Performance Computing in Asia-Pacific Region
    • Int'l Joint Research
  • [Presentation] Initial Design and Evaluation of RIKEN CGRA: Data-Driven Architecture for Future HPC2022

    • Author(s)
      Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
    • Organizer
      リコンフィギャラブルシステム研究会
  • [Presentation] HPC向けRIKEN CGRAのためのコンパイル環境整備と予備評価2022

    • Author(s)
      小島拓也,・Carlos Cesar Cortes Torres,・Boma Adhi,・Yiyu Tan・佐野健太郎
    • Organizer
      リコンフィギャラブルシステム研究会
  • [Presentation] FPGA-based Acceleration on Sound Field Rendering2022

    • Author(s)
      Yiyu Tan, Toshiyuki Imamura, and Masaaki Kondo
    • Organizer
      The 4th R-CCS International Symposium
  • [Presentation] Parameterized environment for evaluating a CGRA for HPC2022

    • Author(s)
      Carlos Cesar Cortes Torres, Boma Anantasatya Adhi, Tan Yiyu, Takuya Kojima, Artur Podobas and Kentaro Sano
    • Organizer
      The 4th R-CCS International Symposium
  • [Presentation] Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation2022

    • Author(s)
      Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano
    • Organizer
      The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing
    • Int'l Joint Research
  • [Presentation] An Architecture-Independent CGRA Compiler enabling OpenMP Applications2022

    • Author(s)
      Takuya Kojima, Carlos Cesar Cortes Torres,・Boma Adhi,・Yiyu Tan, and Kentaro Sano
    • Organizer
      The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing
    • Int'l Joint Research
  • [Presentation] RIKEN CGRA: Data-Driven Architecture as an Extension of Multicore CPU for Future HPC2021

    • Author(s)
      Boma Adhi, Takuya Kojima, Yiyu Tan, Artur Podobas, Kentaro Sano
    • Organizer
      International Conference on High Performance Computing, Networking, Storage, and Analysis
    • Int'l Joint Research

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Published: 2022-12-28  

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