2011 Fiscal Year Final Research Report
A Study on the LSI Design with Ultra Low-Power Consumption of Robust Speech Recognition Systems
| Project/Area Number |
20300014
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Hokkaido University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
YOSHIZAWA Shingo 北海道大学, 大学院・情報科学研究科, 助教 (20447080)
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| Project Period (FY) |
2008 – 2011
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| Keywords | 回路とシステム / ハードウエア設計 / 音声情報処理 / 信号処理 |
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| Research Abstract |
In this study, the following two important results have been obtained :(1) the development of acoustic ghost canceller in automatic speech recognition system, and (2) very low power consumption LSI of real time speech recognition. About (1), the new speech feature extraction and the new training method for HMM have been proposed and developed. Using these techniques, the high accuracy of speech recognition is shown under actual noisy environment. About (2), the new hardware design suitable for the method of (1) has been proposed. The proposed LSI has been designed with ultra low power consumption where lower voltage supply, lower clock rate, and parallel/pipeline processing are applied to the proposed architecture.
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[Presentation] VT-AMDF, a Pitch Detection Algorithm2009
Author(s)
Nutthacha Prukkanon, Kosin Chamnongthai, Yoshikazu Miyanaga, KohjiHiguchi
Organizer
International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
Place of Presentation
金沢
Year and Date
2009-12-07
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