2010 Fiscal Year Final Research Report
A Study on Processor Architectures that are tolerable to Soft-error, Process variation, and Aging.
| Project/Area Number |
20300019
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Fukuoka University |
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Principal Investigator |
SATO Toshinori Fukuoka University, 工学部, 教授 (00322298)
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| Co-Investigator(Kenkyū-buntansha) |
HAYASHIDA Takanori 福岡大学, 工学部, 助教 (00380551)
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| Project Period (FY) |
2008 – 2010
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| Keywords | ディペンダブル / 省エネルギー / 低消費電力 / システムオンチップ / 計算機システム |
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| Research Abstract |
Semiconductor LSI technologies has been improved for decades. Smart phones are the representative, which benefit from the improvement. However, unfortunately, serious problems areemerging. Since transistors are much shrunken, their reliability is severely degraded. Hence, IT devices utilizing such transistors also become unreliable. This study attacks the problems. For some cases, the degradation in transistors is reduced by 70%.
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