2010 Fiscal Year Final Research Report
Development of Design Methodology for IC Chip Cooling Channel by Using Natural Branching System
| Project/Area Number |
20360076
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Design engineering/Machine functional elements/Tribology
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| Research Institution | Kanazawa University |
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Principal Investigator |
YAMAZAKI Koetsu Kanazawa University, 機械工学系, 教授 (70110608)
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| Co-Investigator(Kenkyū-buntansha) |
KITAGAWA Akio 金沢大学, 電子情報学系, 准教授 (10214785)
AKITA Junichi 金沢大学, 電子情報学系, 准教授 (10303265)
TADA Yukio 金沢大学, 機械工学系, 准教授 (20179708)
KITAYAMA Satoshi 金沢大学, 機械工学系, 准教授 (90339698)
SAKAI Shinobu 金沢大学, 機械工学系, 助教 (80196039)
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| Project Period (FY) |
2008 – 2010
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| Keywords | 冷却チャンネル分岐網 / LSIパッケージ廃熱 / 電子基板廃熱 / 最適廃熱設計 |
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| Research Abstract |
Cuntermeasures against heating up are one of the important issues for Integrated Circuit(IC) on the substrate and IC chips themselves, because the increased density and temperature of IC chips cause malfunctions of circuits. But the traditional countermeasures such as the cooling fan and the heat sink have a limitation in cooling performance. So we have focused on the cooling channel with superior cooling performance. Design methods of cooling pathway by utilizing the optimality of branching system and channel layout design have been suggested. And the cooling performances of the proposed design method have been evaluated by both methods of CAE simulation and an experiment, and by comparing the results of the conventional design method.
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