2023 Fiscal Year Annual Research Report
Intelligent Active Balancing of Parallel/Series-connected Power Devices
Project/Area Number |
20K14720
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Research Institution | Kyushu Institute of Technology |
Principal Investigator |
Tripathi Ravi・Nath 九州工業大学, 次世代パワーエレクトロ二クス研究センター, 助教 (00869745)
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Project Period (FY) |
2020-04-01 – 2024-03-31
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Keywords | Power device / Parallel-connected / Gate Driving Control / Current Balancing |
Outline of Annual Research Achievements |
The active gate control is employed for the parallel-connected power semiconductor devices and current unbalancing is minimized using active gate control methodology. This active gate delay control is implemented for the SiC power devices as well as the IGBT power devices. The active gate control strategy is employed under the dynamic operation of the device that is turn-on and turn-off. Further the research analysis is performed on the gate signal characteristic study corresponding to the active gate control. The correlation between the device current unbalancing and Miller plateau is realized. Under unbalancing state the miller period of the devices are different and after the gate delay control that forces the current unbalancing was minimized due to improved miller plateau period.
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