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2013 Fiscal Year Annual Research Report

グラフォアセンブリーによる三次元積層型光電子集積システム・オン・チップ

Research Project

Project/Area Number 21226009
Research InstitutionTohoku University

Principal Investigator

小柳 光正  東北大学, 未来科学技術共同研究センター, 教授 (60205531)

Co-Investigator(Kenkyū-buntansha) 福島 誉史  東北大学, 未来科学技術共同研究センター, 准教授 (10374969)
田中 徹  東北大学, 大学院医工学研究科, 教授 (40417382)
羽根 一博  東北大学, 工学(系)研究科(研究院), 教授 (50164893)
清山 浩司  長崎総合科学大学, 工学部, 准教授 (60412722)
三浦 英生  東北大学, 工学(系)研究科(研究院), 教授 (90361112)
Project Period (FY) 2009-05-11 – 2014-03-31
Keywordsグラフォアセンブリー / セルフアセンブリー / 三次元集積化 / 光電子集積化 / スーパーチップ / シリコン貫通配線 / 光電子集積システム・オン・チップ
Research Abstract

高性能で、低電力、高機能の光電子集積システム・オン・チップの実現を目指して、前年度に引き続きグラフォアセンブリー技術、シリコン貫通配線、シリコン貫通光インターコネクション、シリコンフォト二クス・デバイスなどの要素技術について研究するととも
に、それらの技術を評価するためのテストチップ、テストモジュールの設計、試作に取り組んだ。グラフォアセンブリー技術に関しては、グラフォアセンブリーのための表面凹凸パターン、液滴量の最適化を行って、位置合わせ精度が0.1~0.5μmにおさまるまでに改善された。チップ貫通光インターコネクションに関しては、試作したミラー構造を有するグレーティングカップラの評価を行い、光TSV (TSPV:Through-Si Photonic Via)を伝搬してきた垂直方向の光信号を、チップ表面に形成した水平方向のSi光導波路へと83%の結合効率で結合させることができることを確認した。また、Geホトダイオードを用いた光検出器に関しては、Geホトダイオード搭載チップのGe基板を30μmまで薄くする際のチップ割れと薄化後のGe表面の平坦性を改善するために、Geチップ張り合わせ技術とチップ薄化技術の改善を行い、Si光導波路上に薄化Geホトダイオードを良好に形成できるようになった。更に、試作した三層積層光電子集積システム・オン・チップの評価を行い、プロセッサTEG、制御回路TEG、メモリTEGが良好に動作していることを確認した。また、三次元積層型光電子集積システム・オン・チップを搭載するためのSiインターポーザー技術も確立し、この技術を基盤として、チップ間光インターコネクションで接続した光電子集積システムモジュールの試作も行った。

Current Status of Research Progress
Reason

25年度が最終年度であるため、記入しない。

Strategy for Future Research Activity

25年度が最終年度であるため、記入しない。

  • Research Products

    (39 results)

All 2014 2013 Other

All Journal Article (10 results) (of which Peer Reviewed: 10 results) Presentation (25 results) (of which Invited: 13 results) Book (1 results) Remarks (1 results) Patent(Industrial Property Rights) (2 results) (of which Overseas: 1 results)

  • [Journal Article] Reconfigured-Wafer-to-Wafer 3D Integration Using Parallel Self-Assembly of Chips With Cu-SnAg Microbumps and a Nonconductive Film2014

    • Author(s)
      Takafumi Fukushima, Ji Cheol Bea, Hisashi Kino, Chisato Nagai, Mariappan Murugesan, Hideto Hashiguchi, Kang-Wook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Journal Title

      IEEE TRANSACTIONS ON ELECTRON DEVICES

      Volume: Vol.61, No.2 Pages: 533-539

    • DOI

      10.1109/TED.2013.2294831

    • Peer Reviewed
  • [Journal Article] 3D Integration Technologies Using Self-Assembly and Electrostatic Temporary Multichip Bonding2013

    • Author(s)
      T.Fukusima, H.Hashiguchi, J.Bea, M.Mururesan, K-W.Lee, T.Tanaka, and M.Koyanagi
    • Journal Title

      Proc.of IEEE 63rd ECTC

      Volume: VOL.63 Pages: 58-63

    • DOI

      10.1109/ECTC.2013.6575550

    • Peer Reviewed
  • [Journal Article] Improvement of the Reliability of TSV Interconnections by Controlling Crystallinity of Electroplated Copper Thin Films2013

    • Author(s)
      Ryosuke Furuya, Chuanhong Fan, Osamu Asai, Ken Suzuki, and Hideo Miura
    • Journal Title

      Proc. of IEEE 63rd ECTC

      Volume: Vol.63 Pages: 635-640

    • DOI

      10.1109/ECTC.2013.6575640

    • Peer Reviewed
  • [Journal Article] Reductant-Assisted Self-Assembly with Cu/Sn Microbump for Three-Dimensional Heterogeneous Integration2013

    • Author(s)
      Yuka Ito, Takafumi Fukushima, Kang-Wook Lee, Koji Choki, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Journal Title

      Japanese Journal of Applied Physics (JJAP)

      Volume: 52 Pages: 04CB09-1-09-6

    • DOI

      10.7567/JJAP.52.04CB09

    • Peer Reviewed
  • [Journal Article] Die-Level 3-D Integration Technology for Rapid Prototyping of High-Performance Multifunctionality Hetero-Integrated Systems2013

    • Author(s)
      Kang-Wook Lee, Yuki Ohara, Kouji Kiyoyama, Ji-Cheol Bea, Mariappan Murugesan, Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Journal Title

      IEEE TRANSACTIONS ON ELECTRON DEVICES

      Volume: 60 Pages: 3842-3848

    • DOI

      10.1109/TED.2013.2280273

    • Peer Reviewed
  • [Journal Article] Flux-Assisted Self-Assembly with Microbump Bonding for 3D Heterogeneous Integration2013

    • Author(s)
      Yuka Ito, Takafumi Fukushima, Kang-Wook Lee, Koji Choki, Tetsu Tanaka, Mitsumasa Koyanagi
    • Journal Title

      Proc. of IEEE 63rd ECTC

      Volume: 63 Pages: 891 - 896

    • DOI

      10.1109/ECTC2013.6575679

    • Peer Reviewed
  • [Journal Article] IMPROVEMENT OF MECHANICAL RELIABILITY OF 3D ELECTRONIC PACKAGING BY CONTROLLING THE MECHANICAL PROPERTIES OF ELECTROPLATED MATERIALS2013

    • Author(s)
      Ken Suzuki, Hideo Miura
    • Journal Title

      Proc. of ASME IMECE2013

      Volume: 2013-73150 Pages: CD-R

    • Peer Reviewed
  • [Journal Article] 半導体実装用めっき銅薄膜強度物性の微細組織依存性2013

    • Author(s)
      遠藤史明,古屋亮輔,鈴木研,三浦英生
    • Journal Title

      電子情報通信学会論文誌C

      Volume: J96-C Pages: 400-408

    • Peer Reviewed
  • [Journal Article] A tunable notch filter using microelectromechanical microring with gap-variable busline coupler2013

    • Author(s)
      T. Ikeda, K. Hane
    • Journal Title

      Optics Express

      Volume: 21 Pages: 22034-22042

    • DOI

      10.1364/OE.21.022034

    • Peer Reviewed
  • [Journal Article] Transmisison-width-tunable silicon-photonic microelectromechanical ring resonator2013

    • Author(s)
      M. Ordu, K. Hane
    • Journal Title

      IEEE Photonics Technology Letters

      Volume: 25 Pages: 2236-2238

    • DOI

      10.1109/LPT.2013.2285130

    • Peer Reviewed
  • [Presentation] Chip-to-Wafer 3D Stacking Using Self-Assembly and Electrostatic Temporary Bonding/Debonding

    • Author(s)
      H. Hashiguchi, T. Fukushima, J. Bea, H. Kino, K.-W. Lee, T.Tanaka, M. Koyanagi
    • Organizer
      International Conference on Electronics Packaging 2013 (ICEP2013)
    • Place of Presentation
      Osaka International Convention Center
  • [Presentation] Challenges in 3D Integration

    • Author(s)
      Mitsumasa Koyanagi, Kang Wook Lee, Takafumi Fukushima, and Tetsu Tanaka
    • Organizer
      223th Electrochemical Society (ECS) Meeting
    • Place of Presentation
      Toronto, Canada,
    • Invited
  • [Presentation] 3D Integration Technologies Using Self-Assembly and Electrostatic Temporary Multichip Bonding

    • Author(s)
      T. Fukushima, H. Hashiguchi, J. Bea, M. Murugesan, K.-W. Lee, T.Tanaka, and M. Koyanagi
    • Organizer
      The 63rd Eelectronic Components and Technology Conference
    • Place of Presentation
      Las Vegas, USA
  • [Presentation] Flux-Assisted Self-Assembly with Microbump Bonding for 3D Heterogeneous Integration

    • Author(s)
      Yuka Ito, Takafumi Fukushima, Kang-Wook Lee, Koji Choki, Tetsu Tanaka, Mitsumasa Koyanagi
    • Organizer
      The 63rd Eelectronic Components and Technology Conference
    • Place of Presentation
      Las Vegas, USA
  • [Presentation] Improvement of the Reliability of TSV Interconnections by Controlling Crystallinity of Electroplated Copper Thin Films

    • Author(s)
      Ryosuke Furuya, Chuanhong Fan, Osamu Asai, Ken Suzuki, and Hideo Miura
    • Organizer
      The 63rd Eelectronic Components and Technology Conference
    • Place of Presentation
      Las Vegas, USA
    • Invited
  • [Presentation] 3D Heterogeneous System Integration and New 3D LSIs

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      IEEE Symposium on VLSI Circuits Workshop
    • Place of Presentation
      Kyoto
    • Invited
  • [Presentation] Improvement of Device Performance in 3D Modules by Optimizing Mechanical Stress and Strain Fields

    • Author(s)
      Hideo Miura
    • Organizer
      2nd Annual World Congress of Emerging Info Tech 2013
    • Place of Presentation
      Dalian, China
    • Invited
  • [Presentation] 三次元LSIとヘテロインテグレーション

    • Author(s)
      李康旭,福島誉史,田中徹,小柳光正
    • Organizer
      半導体・集積路技術シンポジウム
    • Place of Presentation
      東京
    • Invited
  • [Presentation] 三次元ヘテロ集積化技術とスーパーチップ

    • Author(s)
      小柳光正,福島誉史,李康旭,田中徹
    • Organizer
      スマートプロセス学会電子デバイス実装研究委員会
    • Place of Presentation
      東京
    • Invited
  • [Presentation] Evaluation of the Crystallographic Quality of Electroplated Copper Thin-Film Interconnections Embedded in a Silicon Substrate

    • Author(s)
      Ryosuke Furuya, Osamu Asai, Chuanhong Fan, Ken Suzuki, Hideo Miura
    • Organizer
      ASME2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems
    • Place of Presentation
      Burlingame, California, USA
  • [Presentation] 自己組織化による三次元集積化技術

    • Author(s)
      小柳光正
    • Organizer
      自然から学ぶナノテクノロジーセミナー (物質・材料研究機構)
    • Place of Presentation
      筑波
    • Invited
  • [Presentation] C2W三次元集積のための自己組織化静電仮接合の評価

    • Author(s)
      橋口 日出登, 福島 誉史, 裵 志哲, 木野久志, 李 康旭, 田中 徹, 小柳 光正
    • Organizer
      2013秋季第74 回応用物理学会秋季学術講演会
    • Place of Presentation
      同志社大学京田辺キャンパス
  • [Presentation] Self-Assembly and Electrostatic (SAE) Carrier Technology for Via-Last Backside-Via Multichip-to-Wafer 3D Integration

    • Author(s)
      Hideto Hashiguchi, Takafumi Fukushima, Jicheol Bea, Kang-Wook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Organizer
      2013 International Conference on Solid State Materials and Devices(SSDM2013)
    • Place of Presentation
      Hilton Fukuoka Sea Hawk, Fukuoka
  • [Presentation] Self-Assembly Study to Precisely Align Dies Having Microbump Covered with Non-Conductive Film for Advanced Chip-to-Wafer 3D Integration

    • Author(s)
      Yuka Ito, Takafumi Fukushima, Kang-Wook Lee, Koji Choki, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Organizer
      2013 International Conference on Solid State Materials and Devices(SSDM2013)
    • Place of Presentation
      Hilton Fukuoka Sea Hawk, Fukuoka
  • [Presentation] Micro-Texture Dependence of Mechanical Properties of Fine Metallic Bumps Used for Three-Dimensional Electronic Packaging

    • Author(s)
      Ken Suzuki, Ryosuke Furuya, Fumiaki Endo and Hideo Miura
    • Organizer
      2013 International Conference on Solid State Materials and Devices(SSDM2013)
    • Place of Presentation
      Hilton Fukuoka Sea Hawk, Fukuoka
  • [Presentation] Development of Via-Last 3D Integration Technologies Using a New Temporary Adhesive System

    • Author(s)
      T. Fukushima, J. Bea, M. Murugesan, K.-W. Lee, and M. Koyanagi
    • Organizer
      IEEE International Conference on 3D System Integration (3D IC)
    • Place of Presentation
      San Francisco, USA
  • [Presentation] 3D Memory Chip Stacking by Multi-Layer Self-Assembly Technology, The IEEE International Conference on 3D System Integration (3D IC)

    • Author(s)
      T. Fukushima, J. Bea, M. Murugesan, H.-Y. Son, M.-S. Suh, K.-Y.Byun, N.-S. Kim, K.-W. Lee, and M. Koyanagi
    • Organizer
      IEEE International Conference on 3D System Integration (3D IC)
    • Place of Presentation
      San Francisco, USA
  • [Presentation] 3DIC Activity at Tohoku University

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      IEEE International Conference on 3D System Integration (3D IC)
    • Place of Presentation
      San Francisco, USA
    • Invited
  • [Presentation] Effect of Microtexture in Electroplated Copper Thin Films on Their Thermal Conductivity

    • Author(s)
      Rittinon Pornvitoo, Osamu Asai, Ken Suzuki, Hideo Miura
    • Organizer
      15th International Conference on Electronic Materials and Packing
    • Place of Presentation
      Seoul, Korea
  • [Presentation] 3D Integration and Reliability Challenges

    • Author(s)
      Mitsumasa Koyanagi, Mariappan Murugesan, Kangwook Lee, Takafumi Fukushima, Tetsu Tanaka
    • Organizer
      224th Electrochemical Society (ECS) Meeting
    • Place of Presentation
      San Francisco, USA
    • Invited
  • [Presentation] 三次元集積化による超低消費電力化

    • Author(s)
      小柳光正
    • Organizer
      第29回京都賞記念ワークショップ先端技術部門
    • Place of Presentation
      京都国際会館
    • Invited
  • [Presentation] Heterogeneous 3D Integration - Technology Enabler toward Future Super-Chip (Plenary Talk)

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      IEEE International Electron Devices Meeting (IEDM) 2013
    • Place of Presentation
      Washington D.C., USA
    • Invited
  • [Presentation] Characterization and Reliability of 3-D LSI and SiP

    • Author(s)
      K-W Lee, M. Murugesan, J-C Bea, T. Fukushima, T. Tanaka, and M. Koyanagi
    • Organizer
      IEEE International Electron Devices Meeting (IEDM) 2013
    • Place of Presentation
      Washington D.C., USA
    • Invited
  • [Presentation] シリコン導波路とMEMSアクチュエータの組み合わせによる光路制御 -;波長選択スイッチのためのMEMS可変マイクロリング-

    • Author(s)
      羽根 一博, ホアンマン チュ
    • Organizer
      電子情報通信学会光エレクトロニクス研究会
    • Place of Presentation
      東京(機械振興会館)
  • [Presentation] 3D System Module with Stacked Image Sensors, Stacked Memories and Stacked Processors on a Si Interposer

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      IEEE Solid-State Circuits Conference (ISSCC) 2014, 3D-Forum
    • Place of Presentation
      San Francisco, USA
    • Invited
  • [Book] Handbook of 3D Integration Volume 3: 3D Process Technology, 執筆担当部分:Chapter 6.6, “Via Reveal and Backside Processing” (in press)2014

    • Author(s)
      Mitsumasa Koyanagi, Tetsu Tanaka
    • Total Pages
      280 (5・1・21-5・1・30)
    • Publisher
      Wiley-VCH
  • [Remarks] Global Integration Initiative (GINTI)

    • URL

      http://www.ginti.niche.tohoku.ac.jp

  • [Patent(Industrial Property Rights)] 半導体装置2014

    • Inventor(s)
      鈴木拓、北村康宏、浅見一志、小柳光正、福島誉史、李康旭
    • Industrial Property Rights Holder
      東北大学、(株)デンソー
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      特願2014-53473
    • Filing Date
      2014-03-17
  • [Patent(Industrial Property Rights)] チップ支持基板、チップ支持方法、三次元集積回路、アセンブリ装置及び三次元集積回路の製造方法2013

    • Inventor(s)
      小柳光正、福島誉史、田中徹
    • Industrial Property Rights Holder
      東北大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      PCT/JP2013/74876
    • Filing Date
      2013-09-13
    • Overseas

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Published: 2015-05-28  

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