Three-Dimensionarlly Stacked Optoelectronic System-on-Chip Fabricated Using Grapho-Assembly

2013 Fiscal Year Final Research Report

• Project/Area Number: 21226009
• Research Category: Grant-in-Aid for Scientific Research (S)
• Allocation Type: Single-year Grants
• Research Field: Electron device/Electronic equipment
• Research Institution: Tohoku University
• Principal Investigator: KOYANAGI Mitsumasa 東北大学, 未来科学技術共同研究センター, 教授 (60205531)
• Co-Investigator(Kenkyū-buntansha): FUKUSHIMA Takafumi 東北大学, 未来科学技術共同研究センター, 准教授 (10374969) ; TANAKA Testu 東北大学, 大学院医工学研究科, 教授 (40417382) ; HANE Kazuhiro 東北大学, 大学院工学研究科, 教授 (50164893) ; MIURA Hideo 東北大学, 大学院工学研究科, 教授 (90361112) ; PEI Yanli 東北大学, 国際高等研究教育機構, 助教 (70451622) ; KIYOYAMA Kouji 長崎総合科学大学, 工学部, 准教授 (60412722)
• Project Period (FY): 2009-05-11 – 2014-03-31
• Keywords: グラフォアセンブリー / セルフアセンブリー / 三次元集積化 / 光電子集積化 / スーパーチップ / シリコン貫通配線 / 光電子集積システム・オン・チップ

Research Abstract

Key technologies to achieve a 3D-stacked optoelectronic system-on-a chip (SOC) have been studied focusing on new grapho-assembly technology to achieve 3D stacking with high alignment accuracy and new 3D silicon photonics. We formed micro/nano-scale concavo-convex patterns on both upper and lower silicon chip surfaces and then these chips were precisely aligned making use of surface tension of liquid in the gapho-assembly. A high alignment accuracy of less than 0.1um has been achieved using the gapho-assembly. We have developed new technologies of TSPV (Through Si Photonic Via) and UDOC (Uni-Directional Optical Coupler). We successfully fabricated TSPV with a diameter of 10um showing excellent optical confinement. We proposed and fabricated a new optical grating coupler with side mirror. We confirmed that vertical optical signal propagated through TSPV was coupled to horizontal Si nano optical waveguide using this optical grating coupler with high coupling efficiency of more than 80%.

Research Products

• [Journal Article] Reconfigured-Wafer-to-Wafer 3D Integration Using Parallel Self-Assembly of Chips With Cu-SnAg Microbumps and a Nonconductive Film (2014)
  • Author(s): Takafumi Fukushima, Ji Cheol Bea, Hisashi Kino, Chisato Nagai, Mariappan Murugesan, Hideto Hashiguchi, Kang-Wook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi
  • Journal Title: IEEE TRANSACTIONS ON ELECTRON DEVICES Volume: Vol.61, No.2 Pages: 533-539
  • DOI: 10.1109/TED.2013.2294831
  • Peer Reviewed
• [Journal Article] Die-Level 3-D Integration Technology for Rapid Prototyping of High -Performance Multifunctionality Hetero-Integrated Systems (2013)
  • Author(s): Kang-Wook Lee, Yuki Ohara, Kouji Kiyoyama, Ji-Cheol Bea, Mariappan Murugesan,Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi
  • Journal Title: IEEE TRANSACTIONS ON ELECTRON DEVICES Volume: VOL.60, NO.11 Pages: 3842-3848
  • DOI: 10.1109/TED.2013.2280273
  • Peer Reviewed
• [Journal Article] 3D Integration Technologies Using Self-Assembly and Electrostatic Temporary Multichip Bonding (2013)
  • Author(s): T.Fukusima, H.Hashiguchi, J.Bea, M.Mururesan, K-W.Lee, T.Tanaka, and M.Koyanagi
  • Journal Title: Proc.of IEEE 63rd ECTC Volume: VOL.63 Pages: 58-63
  • DOI: 10.1109/ECTC.2013.6575550
  • Peer Reviewed
• [Journal Article] Improvement of the Reliability of TSV Interconnections by Controlling Crystallinity of Electroplated Copper Thin Films (2013)
  • Author(s): Ryosuke Furuya, Chuanhong Fan, Osamu Asai, Ken Suzuki, and Hideo Miura
  • Journal Title: Proc. of IEEE 63rd ECTC Volume: Vol.63 Pages: 635-640
  • DOI: 10.1109/ECTC.2013.6575640
  • Peer Reviewed
• [Journal Article] Wavelength characteristics of gap-variable silicon nanowire waveguide coupler switch using micro actuator (2013)
  • Author(s): Y.Munemasa, Y.Akihama, K.Hane
  • Journal Title: IEEEJ Trans. Sensors Micromachines Volume: vol.133 Pages: 85-89
  • DOI: 10.1541/ieejsms.133.85
  • Peer Reviewed
• [Journal Article] New Chip -to-Wafer 3D Integration Technology Using Hybrid Self-Assembly and Electrostatic Temporary Bonding (2012)
  • Author(s): T. Fukushima, H. Hashiguchi, J. Bea, Y. Ohara, M. Murugesan, K.-W. Lee, T. Tanaka, and M.Koyanagi
  • Journal Title: 2012 IEEE International Electron Devices Meeting Technical Digest (IEDM) Pages: 789-792
  • DOI: 10.1109/IEDM.2012.6479157
  • Peer Reviewed
• [Journal Article] Multichip-to-Wafer Three-Dimensional Integration Technology Using Chip Self-Assembly With Excimer Lamp Irradiation (2012)
  • Author(s): Takafumi Fukushima, Eiji Iwata, Yuki Ohara, Mariappan Murugesan, Jichoel Bea, Kangwook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi
  • Journal Title: IEEE TRANSACTIONS ON ELECTRON DEVICES Volume: VOL.59(11) Pages: 2956-2963
  • DOI: 10.1109/TED.2012.2212709
  • Peer Reviewed
• [Journal Article] Minimization of the Local Residual Stress in 3D Flip Chip Structures by Optimizing the Mechanical Properties of Electroplated Materials and the Alignment Structure of TSVs and Fine Bumps (2012)
  • Author(s): Kota Nakahira, Hironori Tago, Ken Suzuki, Hideo Miura, Fumiaki Endo
  • Journal Title: J. of Electronic Packaging Volume: VOL.134(2) Pages: 021006-1-6
  • DOI: 10.1115/1.4006142
  • Peer Reviewed
• [Journal Article] Through-Silicon Photonic Via and Unidirectional- Coupler for High-Speed Data Transmission in Optoelectronic Three- Dimensional LSI (2012)
  • Author(s): Akihiro Noriki, Kangwook Lee, Jicheol Bea, Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi
  • Journal Title: IEEE ELECTRON DEVICES LETTERS Volume: Vol.33 Pages: 221-223
  • DOI: 10.1109/LED.2011.2174608
  • Peer Reviewed
• [Journal Article] Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing (2011)
  • Author(s): Takafumi Fukushima, Eiji Iwata, Yuki Ohara, Mariappan Murugesan, Jichoel Bea, Kangwook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi
  • Journal Title: IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY Volume: VOL.1 Pages: 1873-1884
  • DOI: 10.1109/TCPMT.2011.2160266
  • Peer Reviewed
• [Journal Article] Three-Dimensional Hybrid Integration Technology of CMOS, MEMS, and Photonics Circuits for Optoelectronic Heterogeneous Integrated Systems (2011)
  • Author(s): Kang-Wook Lee, Akihiro Noriki, Kouji Kiyoyama, Takafumi Fukushima, Tetsu Tanaka, and Mitsumasa Koyanagi
  • Journal Title: IEEE TRANSACTIONS ON ELECTRON DEVICES Pages: 748-757
  • DOI: 10.1109/TED.2010.2099870
  • Peer Reviewed
• [Journal Article] Surface-tensiondriven chip self-assembly with load-free hydrogen fluoride-assisted direct bonding at room temperature for three-dimensional integrated circuits (2010)
  • Author(s): T. Fukushima, E. Iwata, T. Konno, J.-C. Bea, K.-W. Lee, T. Tanaka, and M. Koyanagi
  • Journal Title: Applied Physics Letters Volume: VOL.96 Pages: 154105-1-154105-3
  • DOI: 10.1063/1.3328098
  • Peer Reviewed
• [Journal Article] Optical Interposer Technology Using Buried Vertical-Cavity Surface-Emitting Laser Chip and Tapered Through-Silicon Via for High-Speed Chip-to-Chip Optical Interconnection (2009)
  • Author(s): Akihiro Noriki, Makoto Fujiwara, Kang-Wook Lee, Woo-Cheol Jeong, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Journal Title: Japanese Journal of Applied Physics Volume: VOL.48 Pages: C113-1-C113-5
  • DOI: 10.1143/JJAP.48.04C113
  • Peer Reviewed
• [Journal Article] Ultra-small silicon waveguide coupler switch using gap-variable mechanism
  • Author(s): Y.Akihama, Y.Kanamori, K.Hane
  • Journal Title: Optics Express Volume: 1.19, 11 Pages: 23658-23663
  • DOI: 10.1364/OE.19.023658
  • Peer Reviewed
• [Presentation] Heterogeneous 3D Integration-Technology Enabler toward Future Super-Chip (Plenary Talk) (2013)
  • Author(s): Mitsumasa Koyanagi
  • Organizer: IEEE International Electron Devices Meeting 2013 (IEDM)
  • Place of Presentation: アメリカ、ワシントンD.C.
  • Year and Date: 2013-12-09
• [Presentation] 三次元集積化による超低消費電力化 (2013)
  • Author(s): 小柳 光正
  • Organizer: 第29回京都賞記念ワークショップ先端術部門
  • Place of Presentation: 京都
  • Year and Date: 2013-11-12
• [Presentation] Fabrication Tolerance Evaluation of High Efficient Unidirectional Optical Coupler for Though Silicon Photonic Via in Optoelectronic 3D-LSI (2012)
  • Author(s): A. Noriki, K. W. Lee, J. Bea, T. Fukushima, T. Tanaka and M. Koyanagi
  • Organizer: IEEE International 3D System Integration Conference (3DIC) 2011
  • Place of Presentation: 大阪
  • Year and Date: 2012-02-01
• [Presentation] Through Silicon Photonic Via (TSPV) with Si Core for Low Loss and High-Speed Data Transmission in Opto-Electronic 3-D LSI (2010)
  • Author(s): A. Noriki, K.-W. Lee, J. Bea, T. Fukushima, T. Tanaka, and M. Koyanagi
  • Organizer: IEEE International 3D System Integration Conference 2010(3DIC)
  • Place of Presentation: ドイツ, ミュンヘン
  • Year and Date: 2010-11-17
• [Book] Handbook of 3D Integration, Vol.3, 3D Process technology (2014)
  • Author(s): Mitsumasa Koyanagi, Tetsu Tanaka, 他
  • Total Pages: 280 (5・1・21-5・1・30)
  • Publisher: Wiley-VCH
• [Book] 破壊力学体系-壊れない製品設計に向けて-, 第12章2節 薄膜デバイスの信頼設計 (2012)
  • Author(s): 三浦英生, 他
  • Total Pages: 536 (205-210)
  • Publisher: 株式会社エヌ・ティー・エス
• [Book] Handbook of Wafer Bonding (2011)
  • Author(s): M.Koyanagi, 他
  • Total Pages: 450 (139-159)
  • Publisher: Wiley-VCH
• [Book] Untra-thin Chip Technology and Application, Chapter III-11, " 3D Technology Using Ultra-Thin Chips" (2010)
  • Author(s): M.Koyanagi, 他
  • Total Pages: 467 (109-124)
  • Publisher: Springer
• [Book] Materials and technologies for 3-D Integration (2009)
  • Author(s): Mitsumasa Koyanagi(Co-editor/Author)
  • Total Pages: 273 (25-32)
  • Publisher: Material Research Society
• [Remarks] 三次元スーパーチップLSI 試作拠点 Global Integration Initiative(GINTI) ホームページ
  • URL: http//www.ginti.niche.tohoku.ac.jp
• [Remarks] ①2014年3月28日23:00～23:30;世界を支える驚異の技術(ディスカバリー・ジャパン) 新聞報道等
• [Remarks] ②2013年10月9日; 東北大, 宮城に試作拠点開設,3次元LSI 試作を支援(半導体産業新聞) 新聞報道等
• [Remarks] ③2013年10月3日; 半導体の立体構造に挑む東北大の三次元LSI 拠点(日経産業新聞) 新聞報道等
• [Remarks] ④2013年9月25日; 3次元LSI試作拠点完成 多賀城東北大「半導体復権を目指す」(河北新報) 新聞報道等
• [Remarks] ⑤2013年9月24日;「東北の復興を象徴する3次元LSIの世界的拠点に」, 東北大が300mm対応の試作用ラインを公開(日経BP半導体) 新聞報道等
• [Remarks] ⑥2013年9月20日; GINTI 開所式テレビ報道(仙台放送、東日本放送) 新聞報道等
• [Remarks] ⑦2013年9月16日; 第2部<技術編>コストを下げて民生機器へ, TSVの青銅技術を革新, 液体の表面張力で位置合わせ(日経エレクトロニクス, p.51) 新聞報道等
• [Patent(Industrial Property Rights)] 半導体装置 (2014)
  • Inventor(s): 鈴木 拓、北村 康宏、浅見 一志、小柳 光正、福島 誉史、李 康旭
  • Industrial Property Rights Holder: 東北大学、㈱ デンソー
  • Industrial Property Rights Type: 特許
  • Industrial Property Number: 特願2014-53473
  • Filing Date: 2014-03-17
• [Patent(Industrial Property Rights)] チップ支持基板、チップ支持方法、三次元集積回路、アセンブリ装置及び三次元集積回路の製造方法 (2013)
  • Inventor(s): 小柳 光正、福島 誉史、田中 徹
  • Industrial Property Rights Holder: 東北大学
  • Industrial Property Rights Type: 特許
  • Industrial Property Number: PCT/JP2013/74876
  • Filing Date: 2013-09-13
  • Overseas