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2011 Fiscal Year Final Research Report

Acceleration techniques for practical CFD packages using FPGAs

Research Project

  • PDF
Project/Area Number 21500061
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionKeio University

Principal Investigator

AMANO Hideharu  慶應義塾大学, 理工学部, 教授 (60175932)

Co-Investigator(Kenkyū-buntansha) FUJITA Naoyuki  独立行政法人宇宙航空研究開発機構, 研究開発本部, 研究員 (70358480)
OSANA Yasunori  琉球大学, 工学部, 助教 (00532657)
Project Period (FY) 2009 – 2011
Keywordsリコンフィギャラブルシステム / 計算流体動力学 / アクセラレータ
Research Abstract

Practical packages of Computational Fluid Dynamics, UPACS and FaSTAR are accelerated by implementing on FPGAs. For UPACS, the execution speed of subroutines with complicated memory accesses was improved by 5 times to 20 times as the software execution on a PC. By using the partial reconfiguration, the number of utilized FPGAs and consumed power were reduced. For FaSTAR, an Out-of-order mechanism which reduces the number of stalls caused by treating unstructured mesh to only 1% was proposed and implemented. Tools for supporting such designs were also developed.

  • Research Products

    (9 results)

All 2012 2011 2010 2009 Other

All Journal Article (2 results) (of which Peer Reviewed: 2 results) Presentation (6 results) Remarks (1 results)

  • [Journal Article] An Implementation of Out-Of-Order Execution System for Acceleration of Computational Fluid Dynamics on FPGAs2011

    • Author(s)
      T. Akamine, K. Inakagawa, Y. Osana, N. Fujita, H. Amano
    • Journal Title

      ACM Computer Architecture News

      Volume: Vol.39, No.4 Pages: 50-55

    • Peer Reviewed
  • [Journal Article] Implementation and Evaluation of an Arithmetic Pipeline on FLOPS-2D : Multi-FPGA System2010

    • Author(s)
      H. Morishita, K. Inakagawa, Y. Osana, N. Fujita, H. Amano
    • Journal Title

      ACM Computer Architecture News

      Volume: Vol.38, No.4 Pages: 8-13

    • Peer Reviewed
  • [Presentation] Cost Effective Implementation of Flux Limiter Function using Partial Reconfiguration2012

    • Author(s)
      M. Sofian, T. Akamine, Y. Osana, N. Fujita, H. Amano
    • Organizer
      ARC' 2012
    • Place of Presentation
      Hong Kong
    • Year and Date
      2012-03-21
  • [Presentation] ASPE : an Abstraction Framework using ALU Arrays for Scalable Multiple FPGAs system2012

    • Author(s)
      K. Inakagwata, T. Akamine, H. Morishita, Y. Osana, N. Fujita, H. Amano
    • Organizer
      SASIMI' 12
    • Place of Presentation
      Beppu
    • Year and Date
      2012-03-08
  • [Presentation] Execution of a Computational Fluid Dynamics application on FLOPS-2D, a multi-FPGA system2011

    • Author(s)
      H. Amano
    • Organizer
      DATE11 Workshop2
    • Place of Presentation
      Grenoble
    • Year and Date
      2011-03-18
  • [Presentation] Design of ALU Array Based Dataflow Machine for Multi-FPGA System2011

    • Author(s)
      K. Inakagwata, H. Morishita, Y. Osana, N. Fujita, H. Amano
    • Organizer
      DATE11 Workshop2
    • Place of Presentation
      Grenoble
    • Year and Date
      2011-03-18
  • [Presentation] RER : a tuning tool for implementing a computational pipeline across multiple FPGAs2010

    • Author(s)
      H. Morishita, K. Inakagata, Y. Osana, N. Fujita, H. Amano
    • Organizer
      SASIMI' 10
    • Place of Presentation
      Taipei
    • Year and Date
      2010-10-18
  • [Presentation] Modularizing Flux Limiter Functions for a Computational Fluid Dynamics Accelerator on FPGAs2009

    • Author(s)
      K. Inakagwata, H. Morishita, Y. Osana, N. Fujita, H. Amano
    • Organizer
      FPL' 09
    • Place of Presentation
      Prague
    • Year and Date
      2009-09-01
  • [Remarks]

    • URL

      http://www.am.ics.keio.ac.jp/proj/aerotech

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Published: 2013-07-31  

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