2011 Fiscal Year Final Research Report
Determination of absolute value of vacancy concentration for silicon crystal using low-temperature ultrasonic measurement
| Project/Area Number |
21560012
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Applied materials science/Crystal engineering
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| Research Institution | Niigata University |
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Principal Investigator |
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| Co-Investigator(Renkei-kenkyūsha) |
GOTO Terutaka 新潟大学, 自然科学研究科, 教授 (60134053)
NEMOTO Yuichi 新潟大学, 自然科学系, 准教授 (10303174)
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| Project Period (FY) |
2009 – 2011
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| Keywords | シリコン / 原子空孔 / 絶対濃度 / 超音波 |
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| Research Abstract |
Regarding the sample preparation in this study performed by the annealing furnace in the laboratory of university-level cleanness, we have found the following two problems :(1) The cleanness of the laboratory is totally inadequate in order to anneal well-cleaned samples in the contamination-free ambient.(2) The cooling(quenching) speed is insufficient to freeze the vacancies which are in thermal equilibrium in the annealing. We have found that the best way to resolve these problems is to prepare the samples by using the apparatuses and facilities in silicon wafer manufacturing company. The level of the cleanness of the apparatus and the clean room is far higher than that of those in the university. The quenching with sufficiently high speed can also be realized by the rapid thermal annealer(RAT) adopted in silicon wafer manufacturing. In this case however, we have to deal with the silicon wafers of surface orientation<001> and the thickness thinner than 0. 8 mm, instead of the block-shaped samples we first considered for the experiment. In this case, we also have to totally change the regular condition of the ultrasonic measurement into a special one, where we measure the elastic constantC11 by using the longitudinal sound wave propagating along<001> direction through the very thin sample(wafer). We have shown that this method of measurement for the elastic softening is possible. Sample preparation using the RTA in silicon wafer manufacturer is now in progress.
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