Creation of high-performance Si-based spin transistors and development of their spin calculation functions

2023 Fiscal Year Final Research Report

• Project/Area Number: 21H04561
• Research Category: Grant-in-Aid for Scientific Research (A)
• Allocation Type: Single-year Grants
• Section: 一般
• Review Section: Medium-sized Section 21:Electrical and electronic engineering and related fields
• Research Institution: Kyoto University
• Principal Investigator: Shiraishi Masashi 京都大学, 工学研究科, 教授 (30397682)
• Project Period (FY): 2021-04-05 – 2024-03-31
• Keywords: スピントランジスタ / シリコン / スピン演算

Outline of Final Research Achievements

I have driven the research project by setting the following targets: (1)Realization of MR ratio of 100% using SI spin FET and creation of spin-based logic circuit using it, and (2)Realization of Magnetic Logic Gate(MLG) using Si spin FET. As for (1) I established approaches to circumvent the obstacles for realizing the MR ratio of 100%, (a)parasitic resistance problem and (b) the Schottky barrier problem, although the MR ratio of 100% was not unfortunately achieved. As for (2), I realized spin-based logic system and demonstrated calculations such as "NAND" and "OR" by using Si spin FETs.

Free Research Field

物性物理

Academic Significance and Societal Importance of the Research Achievements

低消費エネルギー情報演算のキーテクノロジーの１つであるスピン演算の視点から、毒性がなくユビキタス材料であるシリコンを用いたスピン演算を実現し、将来的な応用に向けた基盤技術を構築でいた点に大きな学術的・社会的意義を有する。