2021 Fiscal Year Research-status Report
Synergistic Integration of Novel Superconductor Electronics for Energy-Efficient Computing Accelerators
| Project/Area Number |
21K04191
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| Research Institution | Yokohama National University |
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Principal Investigator |
アヤラ クリストファー 横浜国立大学, 先端科学高等研究院, 特任教員(准教授) (90772195)
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| Project Period (FY) |
2021-04-01 – 2024-03-31
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| Keywords | superconductor / monolithic integration / computing / adiabatic / sfq / aqfp / cryotron / nanowire |
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| Outline of Annual Research Achievements |
Major achievements include the scaling of our adiabatic circuit technology with the successful demonstration of a 16-bit adiabatic quantum-flux-parametron (AQFP) adder circuit (DOI: 10.1587/transele.2021SEP0001). This gives us confidence in supporting more complex circuits with larger data word sizes. We also presented as an invited speaker at the 2021 Annual Conference of Fundamentals and Materials Society, IEEJ on our previous work and future directions including this project. We also presented at the IEEE International Conference on Rebooting Computing (ICRC 2021) to give an overview of our current work, which we received positive feedback such that we have been invited to speak at the International Symposium on Roadmapping Devices and Systems (ISRDS 2022) to reprise our ICRC talk.
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| Current Status of Research Progress |
Current Status of Research Progress
2: Research has progressed on the whole more than it was originally planned.
Reason
The major task for FY2021 is to conduct project ramp-up in which we leverage our previously established semi-custom design environment and build up support for other technologies such as the novel nanowire cryotrons. We have had many continuous discussions almost on a bi-weekly basis with our collaborator on the cryotron devices where they have shared circuit models. We confirmed their operation and done simple analyses in our environment. With this, we can proceed in the other tasks of this research such as the deeper analysis of hybrid integration of these novel emerging superconductor devices. And as mentioned in the research achievements, we also completed to successful demonstration of a 16-bit adiabatic adder indicating a positive outlook for further scaling.
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| Strategy for Future Research Activity |
Towards pushing the scalability of our technology, we plan to demo a crypto- accelerator circuit. We aim to present the results of this demonstration at the international Applied Superconductivity Conference (ASC 2022) and at the International Solid-State Circuits Conference in FY2022. We will also try to fabricate with our partners a chip which integrates AQFP, SFQ, and nanowire cryotron elements together on a single chip. We hope to show that the nanowire cryotron is an excellent resource for driving the AQFP/SFQ signals off-chip for room temperature readout. We also plan to carry out a thorough investigation of the hybrid integration of these novel superconductor devices and identify appropriate accelerator architectures that can benefit from any circuit synergies we uncover.
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Research Products
(3 results)
