2012 Fiscal Year Final Research Report
Detection of miscalculation caused by precision degradation
| Project/Area Number |
22500051
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Hiroshima City University |
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Principal Investigator |
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| Project Period (FY) |
2010 – 2012
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| Keywords | 計算機アーキテクチャ / 演算精度低下検出 / 長精度計算 |
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| Research Abstract |
To achieve the efficient accuracy degradation detection on floating point number calculation, we developed a vector co-processor that has two or more floating-point arithmetic units with accuracy degradation detection function. And we investigatedthat it worked correctly. Moreover, we compared the number of execution cycles of the workload, which actually causes accuracy degradation, with a conventional processor. Because our vector processor can execute by about 1/5 number of execution cycles, we can practically use this system as a prototype system.
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