2013 Fiscal Year Final Research Report
Development of high-performance public-key cryptographic processors with tamper resistance
| Project/Area Number |
22680003
|
|---|
| Research Category |
Grant-in-Aid for Young Scientists (A)
|
| Allocation Type | Single-year Grants |
|---|
| Research Field |
Computer system/Network
|
|---|
| Research Institution | Tohoku University |
|---|
Principal Investigator |
HOMMA Naofumi 東北大学, 情報科学研究科, 准教授 (00343062)
|
|---|
| Project Period (FY) |
2010-04-01 – 2014-03-31
|
| Keywords | 計算機システム / システムオンチップ / VLSI設計技術 / 暗号プロセッサ / 耐タンパー性 |
|---|
| Research Abstract |
This research project developed a high-performance cryptographic processor with a state-of-the-art tamper resistance capability and its design methodology. More precisely, we designed a processor architecture specified for exponentiation operation which is an integral part of public-key cryptographic operation, and developed an RSA processor highly resistant to side-channel attacks. In addition, we demonstrated the validity of the developed processor through an exhaustive set of experiments on side-channel attacks (i.e., chosen-message power/EM analysis attacks and fault injection attacks) against a prototype implementation of the developed processor. Moreover, we developed an automatic generator which generates RSA processors depending on various design specifications.
|
-
[Journal Article] Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates2012
Author(s)
Miroslav Knezevic, Kazuyuki Kobayashi, Jun Ikegami, Shin'ichiro Matsuo, Akashi Satoh, Unal Kocabas, Junfeng Fan, Toshiro Katashita, Takeshi Sugawara, Kazuo Sakiyama, Ingrid Verbauwhede, Kazuo Ohta, Naofumi Homma, Takafumi Aoki
-
Journal Title
IEEE Transactions on Very Large Scale Integration Systems
Volume: Vol.20, No.5
Pages: 827-840
Peer Reviewed
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
