2012 Fiscal Year Final Research Report
A Systematic Test Generation Approach to Achieving VariousTest Qualities for LSIs Based on Mathematical Programming
| Project/Area Number |
22700049
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system/Network
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| Research Institution | Hiroshima City University (2012)
Japan Advanced Institute of Science and Technology (2010-2011) |
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Principal Investigator |
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| Project Period (FY) |
2010 – 2012
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| Keywords | テスト生成 / 整数計画法 / 充足可能性問題 / 非同期インターコネクト / クロックスキュー / ホールドタイム違反 / 電力制約下テスト / テスト数最小化 |
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| Research Abstract |
This work focused attention on mathematical programming (especially, integer programming) as a test generation framework that can flexibly generate various types of tests required for large-scale integrated circuits (LSIs). Several methods have been devised to formulate integer programming models for different test generation problems and to heuristically solve them. This framework allows us to solve these problems with a powerful off-the-shelf solver for integer programming, without developing any newtechniques dedicated to them. The results can lead to enhancing the reliability of LSIs at low cost.
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